Convey Computer: Hybrid-Core Computer
Key Documents
Hybrid-core approach to high-performance computing relies on FPGA coprocessor.
The Convey HC-1 hybrid-core computer uses an FPGA-based coprocessor to optimize the programmable logic for different workloads, extend x86 processor capabilities, simplify programming, and increase memory bandwidth and processing.
A unified software-development environment makes it possible to program the system in standard C, C++ and Fortran. In addition, the Convey architecture supports application-specific “personalities”—or customized instruction sets—that are optimized for each application type, and speed up workloads such as financial analysis, data mining, seismic processing and bioinformatics.
This scheme works because Convey has used 15 Xilinx FPGAs to build a coprocessor that’s integrated with the x86 CPU. Four Virtex application engines take on the personality for the application required. The computer relies on the other FPGAs for system tasks, such as memory control and bus interface.
Convey’s first customer, the University of California, San Diego, used the HC-1 in its Project GreenLight, an environmental initiative investigating energy-efficient HPC solutions and ways to boost performance while reducing power, cooling and energy needs.
Additional Information
- Excerpts taken from Inside the Box, Convey Computer Thinks Differently in the Xcell Journal, 2010 Customer Innovations Issue