The Xilinx 20nm product portfolio keeps customers a generation ahead of the competition with an expansion of All Programmable offerings from three perspectives:
At 28nm, Xilinx expanded from FPGAs to three categories of All Programmable devices. This enabled a breakthrough in ‘programmable systems integration’ and corresponding advances for improved system level price/performance/watt -- moving both Xilinx and its customers a generation ahead of competition and in system value.
Xilinx is committed to staying a generation ahead with aggressive roadmaps across each of the three elements of its broader portfolio, with each element supporting and strengthening the next.
Figure 1: Xilinx continues to expand its leadership in all three areas.
Xilinx is developing even more advanced 20nm FPGAs and 2nd generation SoCs and 3D ICs to stay a generation ahead, and deliver an extra node worth of performance, power, and integration.
Laying the foundation for the rest of the portfolio, the core FPGA combines the 20nm process with a new set of design innovations for Xilinx’s 8 series FPGAs. These next generation devices give another 50% price-performance-per-watt improvement, twice the memory bandwidth and the next generation of industry leading system optimized transceivers.
The 2nd generation All Programmable SoC features a multi-core heterogeneous processing architecture. Combined with increased bandwidth between the processing system and the programmable logic, this architecture delivers higher levels of programmable systems integration and performance at a fraction of the power consumption.
Figure 2: Xilinx delivers the next level of processing power in heterogeneous multi-core SoCs.
When FPGA technology is infused into All Programmable 3D ICs, the values are multiplied beyond a typical generational improvement. By combining multiple die of different types, the 20nm 3D IC provides integrated wide memory and up to 2x the capacity, system level performance and transceiver bandwidth compared to the previous generation.
Figure 3: Xilinx’s 2nd generation 3D ICs will come in homogeneous and heterogeneous configurations.
Built from the ground up for Xilinx’s 28nm portfolio, the Vivado Design Suite is co-optimized with the 20nm silicon devices to deliver significant quality of results, routability, utilization, and productivity advantages. Productivity for the front end design process is multiplied by more than 4X with high level synthesis and IP integration tools. Productivity in design implementation improves by more than 4X due to faster hierarchical planning and analytic place and route engines as well as support for fast incremental ECOs.
Figure 4: The Vivado Design Suite enables unmatched time to integration and implementation.