The Xilinx Synopsys partnership is a quality solution for today's leading high level and HDL level programmable logic designers.
ASIC prototyping with FPGAs enables fast and accurate SoC system modeling and verification as well as accelerated software and firmware development. Xilinx takes FPGA-based prototyping one step further with the introduction of the Virtex®-7 2000T device which allows end users to break through multi-chip partitioning barriers with the capacity and performance needed to prototype complex ASICs in a single FPGA.
Xilinx’s Virtex-7 2000T FPGA enabled by Stacked Silicon Interconnect (SSI) technology delivers 2 million logic cells, 6.8 billion transistors and 12.5Gb/s serial transceivers, making it ideally suited for the ASIC prototyping and emulation marketplace. The Virtex-7 2000T device:
Learn more with the FPGA-Based Prototyping Methodology Manual.
Xilinx’s innovative Stacked Silicon Interconnect (SSI) technology enables multiple FPGA die to be combined in a single package to deliver more of the FPGA resources (logic, memory, serial transceivers and processing elements) customers demand. This breakthrough technology provides the next level of advanced system integration for applications that require high-logic density and highest performance.
Xilinx has leveraged ASIC prototyping and emulation methodology with the creation of the Zynq™-7000 EPP emulation platform. Utilizing a combination of Virtex-5 and Virtex-6 FPGAs, the Zynq-7000 EPP emulation platform has enabled Xilinx, its ecosystem partners and customers to get a jumpstart on IP and SW development. Xilinx has ported the Zynq-7000 EPP emulation platform to the Virtex-7 2000T device which enables a 5X increase in performance and a 6X reduction in devices.