Getting Started with FPGAsWhat Are FPGAs?Field Programmable Gate Arrays (FPGAs) are programmable semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. As opposed to Application Specific Integrated Circuits (ASICs) where the device is custom built for the particular design, FPGAs can be programmed to the desired application or functionality requirements. Although one-time programmable (OTP) FPGAs are available, the dominant type are SRAM based which can be reprogrammed as the design evolves. Roll cursor over blue highlighted sections of the figure below to see more details. CLB DetailsThe Configurable Logic Block is the basic logic unit in an FPGA. Exact numbers and features vary from device to device, but every CLB consists of a configurable switch matrix with 4 or 6 inputs, some selection circuitry (MUX, etc.), and flip-flops. The switch matrix is highly flexible and can be configured to handle combinatorial logic, shift registers or RAM. A high level CLB overview is shown here. More architectural details can be found in the applicable device´s data sheet.
DCM DetailsDigital clock management is provided by most FPGAs in the industry (all Xilinx FPGAs have this feature), and has nearly eliminated the skew and other issues that designers had to face with in designing global signals into FPGAs in the past. IOB DetailsToday´s FPGAs provide support for dozens of I/O standards thus providing the ideal interface bridge in your system. I/O in FPGAs is grouped in banks (see figure below) with each bank independently able to support different I/O standards. Today´s leading FPGAs provide over a dozen I/O banks, thus allowing flexibility in I/O support.
Figure 1FPGA Block Structure Common FPGA FeaturesToday’s FPGAs have evolved far beyond the basic capabilities present in their predecessors, and incorporate hard (ASIC type) blocks of commonly used functionality such as RAM, clock management, and DSP. Following are the basic components in an FPGA. Configurable Logic Block (CLBs)The CLB is the basic logic unit in an FPGA. Exact numbers and features vary from device to device, but every CLB consists of a configurable switch matrix with 4 or 6 inputs, some selection circuitry (MUX, etc), and flip-flops. The switch matrix is highly flexible and can be configured to handle combinatorial logic, shift registers, or RAM. More architectural details can be found in the applicable device’s data sheet.InterconnectWhile the CLB provides the logic capability, flexible interconnect routing routes the signals between CLBs and to and from I/Os. Routing comes in several flavors, from that designed to interconnect between CLBs to fast horizontal and vertical long lines spanning the device to global low-skew routing for Clocking and other global signals. The design software makes the interconnect routing task hidden to the user unless specified otherwise, thus significantly reducing design complexity.SelectIO (IOBs)Today’s FPGAs provide support for dozens of I/O standards thus providing the ideal interface bridge in your system. I/O in FPGAs is grouped in banks with each bank independently able to support different I/O standards. Today’s leading FPGAs provide over a dozen I/O banks, thus allowing flexibility in I/O support.MemoryEmbedded Block RAM memory is available in most FPGAs, which allows for on-chip memory in your design. These allow for on-chip memory for your design. Xilinx FPGAs provide up to 10 Mbits of on-chip memory in 36 kbit blocks that can support true dual-port operation.Complete Clock ManagementDigital clock management is provided by most FPGAs in the industry (all Xilinx FPGAs have this feature). The most advanced FPGAs from Xilinx offer both digital clock management and phase-looped locking that provide precision clock synthesis combined with jitter reduction and filtering.FPGA Solutions, Applications and End-MarketsDue to their programmable nature, FPGAs are an ideal fit for many different markets. As the industry leader, Xilinx provides comprehensive solutions consisting of FPGA devices, advanced software, and configurable, ready-to-use IP cores for markets and applications such asEnd Markets
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