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AR# 40541 Logicore CPRI v 3.2 - How is the IP affected by the Spartan-6 PK BRAM Issue?

Description

How does the Spartan-6 FPGA 9K Block RAM Initialization issue described in (Xilinx Answer 39999) affect the LogiCORE CPRI IP? Refer to Spartan-6 Errata (including EN148) and (Xilinx Answer 39999) for more details on the Spartan-6 FPGA 9k block RAM initialization issue.

Solution

The Spartan-6 9K Block RAM Initialization issue does not affect the CPRI IP as the core does not use 9K BRAM. However, the example design which is created upon IP generation does use a 9K BRAM. As the example is primarily intended for simulation this will not affect the operation of the IP.

For Release Notes and Known Issues for the LogiCORE CPRI v3.2, please see (Xilinx Answer 36969).

Actions

AR# 40541
Date Created 02/10/2011
Last Updated 02/10/2011
Status Active
Type
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
IP
  • CPRI
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