CPLD

Start Designing with CPLDs

Take these steps to start your CPLD design today!
 

What is a CPLD?

A Complex Programmable Logic Device (CPLD) is a combination of a fully programmable AND/OR array and a bank of macrocells. The AND/OR array is reprogrammable and can perform a multitude of logic functions. Macrocells are functional blocks that perform combinatorial or sequential logic, and also have the added flexibility for true or complement, along with varied feedback paths.

Traditionally, CPLDs have used analog sense amplifiers to boost the performance of their architectures. This performance boost came at the cost of very high current requirements. CoolRunner™-II CPLDs, created by Xilinx, use an innovative all-digital core to achieve the same levels of performance at ultra-low power requirements. This allows designers to use the same CPLD architecture for both high-performance and low-power designs.

The removal of analog sense amplifiers also makes the architecture scalable, allowing for aggressive cost reduction and feature enhancement with each successive process generation.

CPLD Block Structure

CPLD Block Structure
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CPLD Benefits

CPLDs perform a variety of useful functions in systems design due to their unique capabilities and as the market leader in programmable logic solutions, Xilinx provides a total solution to a designer's CPLD needs.

Advanced reprogrammable devices
  • Change your design instantly for no cost as many times as you like
    • Speeds your product time to market
  • Build reconfigurable systems, fix ASIC bugs, upgrade system functions anytime from anywhere
    • Saves time, lowers development cost, and simplifies the design
  • High performance, low power operation
  • Wide range of packaging
  • Advanced system features
  • Highest I/O per macrocell counts
Simple and easy to use
  • Fits easily into existing design flow
    • Saves time, lowers cost, simplifies design
  • Free, powerful ISE® WebPACK™ Software tools offer the most complete, easy-to-use desktop software solution for developing any Xilinx CPLD.
Low cost
  • Reprogrammable to fix system bugs
  • Replaces TTL and ASSPs to reduce board components and improve reliability
    • Lowers design cost, system cost, and maintenance cost
Nonvolatile
  • Programming kept on power down
  • CPLD functions available instantly on system power up
  • Almost impossible to steal stored design
    • Improves security, simplifies design

Xilinx CPLDs

Whether you need low-power, high-performance or a combination of the two, Xilinx has a CPLD solution to fit your design challenge. Plus, you can take the next step and purchase CPLD devices or development kits from the online store.

Features CoolRunner-II XC9500XL
Core Voltage 1.8 3.3/2.5
Macrocells 32-512 36-288
I/Os 21-270 34-192
I/O Tolerance 1.5V, 1.8V, 2.5V, 3.3V 5.0V (XL), 3.3V, 2.5V
TPD / ƒ max  (fastest) 3.8/323 5/222
Ultra Low Standby Power 28.8µW* Low power mode
I/O Standards LVTTL, LVCMOS, HSTL, SSTL LVTTL, LVCMOS

*Lowest system power consumption can be achieved with the CoolRunner-II advanced feature DataGATE.

Designing with CPLDs

Understanding the features and benefits of using CPLDs can help enable ease of design, lower development costs, and speed products to market.

Choosing a CPLD

In choosing the CPLD that is right for a design, you need to make the following determinations (the priority of each will vary according to your design):

  • Density and I/O
    • You can find the size of Xilinx CPLD required (logic density and I/O) for your design by submitting your design to the free downloadable ISE WebPACK software.
  • Performance
    • Xilinx CPLDs come in a variety of speed grades so that you only pay for the performance you need. Use ISE WebPACK to determine the speed grade you need to meet your system timing requirements.
  • Voltage and Power
    • Different Xilinx CPLD families have different voltage (supply and I/O) and power (standby and dynamic) requirements.
  • Packaging
    • Xilinx CPLDs come in a range of packages, from inexpensive QFP packages to ultra small chip-scale pages, to high-I/O-count BGA packages.
Choosing a software package
  • To implement basic CPLD design, you will need our free ISE WebPACK Software tool. Beyond ISE WebPACK software tools, Xilinx offers a variety of software packages to meet various design requirements.
Implementing a design

After selecting a CPLD device and downloading the necessary software, implementing the design is next. Implementation includes:

  • Design entry
  • Programming and testing the prototype
  • Documentation
Purchasing CPLDs

There are several ways to purchase Xilinx solutions:

Each outlet offers silicon, software, programming hardware and more. The Xilinx sales offices and customer support center make sure that the use of Xilinx CPLDs is a simple and satisfying experience.


CPLD Solutions and Services

The design environment and supporting resources are a critical components of the CPLD design environment, as they allow for completing your design quickly and accurately. Xilinx offers the industry's most comprehensive solution, consisting of:

Resource Description
Boards and Kits Xilinx development kits provide out-of-the box design solutions that help evaluate and architect your design.
Documentation Hundreds of application notes, data sheets and reference designs are available to provide you with the technical support you need to start your design.
Intellectual Property Xilinx and its partners offer hundreds of free and for-purchase intellectual property (IP), verified and guaranteed to meet timing parameters, thus speeding up your design cycle and allowing you to focus on the value add components of the design instead of standards conformance.
Software and Design Tools An integrated suite of software tools provide a seamless start-to-end design flow from design entry to configuration (programming the CPLD). To implement basic CPLD designs, download our free ISE WebPACK Software tool.
Training Xilinx hands-on training programs provide you the foundational knowledge necessary to begin designing right away.
 
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