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Xilinx FPGAs are perfect for implementing forward error correction and modulation schemes to support the world's major broadcast standards, including DVB, ATSC, ISDB, DMB, DOCSIS and DAB. As broadcast and telecom converge, the flexibility and programmability of our devices makes it the ideal bridging device between these broadcast standards and telecom protocols for LAN, MAN and WAN connections. |
The unrivalled DSP performance of Xilinx FPGAs also means that more channels can be supported in less devices, reducing bill of materials, PCB area, power management complexity and the overall cost-per-channel. At the same time, FPGAs enable full control over parameterisation and the ability to create a customised solution tailored to your exact requirements.
Fig. 1 Example of FEC and modulation
in DVB-S Modulator
Modulators convert a digital baseband bitstream
into phase shifts (QPSK) and amplitude shifts (QAM) in a carrier
wave that actually gets transmitted through the air or cable.
A receiver demodulates the signal back to a baseband digital
signal and untimately a video transport stream.
FEC is a method of adding extra information to or manipulating data such that it is easier for a receiver to correct any errors in the signal that may have been introduced during its journey from the transmitter. These might be burst errors (such as caused by lighting strikes) or random errors (such as background noise) which are corrected by checking that the raw data correlates with the extra overhead data that was transmitted. Lots of techniques are used for FEC, often in sequence (as in broadcast), to improve the resilience to different types of errors and create a very robust transmission to the consumer.
| IP Core |
Provider |
| DVB-S2
FEC Encoder |
Xilinx, Inc |
| Reed
Solomon Encoder |
Xilinx,
Inc |
| Reed
Solomon Encoder |
Avnet
Design Services |
| Reed
Solomon Encoder |
ASICS
World Service |
| Reed
Solomon Decoder |
Xilinx, Inc |
| Reed
Solomon Decoder |
Avnet
Design Services |
| Reed
Solomon Decoder |
ASICS
World Service |
| Convolutional
Encoder |
Xilinx, Inc |
| Interleaver/Deinterleaver |
Xilinx, Inc |
| Viterbi
Decoder (Parameterised) |
Xilinx, Inc |
| Viterbi
Decoder (Optimised) |
Xilinx, Inc |
| Additive
White Gaussian Noise |
Xilinx, Inc |
| Turbo
Product Code Encoder |
Xilinx, Inc |
| Turbo
Product Code Decoder |
Xilinx, Inc |
| DVB-RCS
Turbo Encoder |
iCoding
Technology, Inc |
| DVB-RCS
Turbo Decoder |
iCoding
Technology, Inc |
| DVB-RCS
Turbo Decoder |
TurboConcept |
FFTs are used in COFDM (Coded Orthogonal Frequency Division Multiplex) transmissions to divide a high frequency signal into thousands of lower frequency signals. The many lower frequency signals are recombined at the receiver. The benefit is that the signal can reflect around obstructions like high buildings or hills, without causing so much interference through multipath delays that the original bitstream cannot be recovered correctly at the receiver. Typical broadcast schemes have opted to use 2K carriers but other variations exist (e.g. 4K, 8K) to enable tradeoffs between data rate and signal robustness.
FIR filters are used in transmission to shape the digital baseband signal through a root-raised cosine technique. This intentionally introduces some intersymbol interference at the transmitter which is cancelled out by the time it reaches the receiver. Broadcast standards specify roll off and bit rate parameters which basically define the FIR filter characteristics, which are easily implemented in Xilinx FPGAs.
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Xilinx
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