The handset market continues its march forward towards total convergence as music, still images, video, WiFi and mobile TV become standard features on smart handsets.  The shear processing power to accomplish these tasks rivals what home PCs offered less than a decade ago.  As designers integrate more features into smart handsets, they are finding that single processor solutions do not have the required features for today’s designs.  There is also a limit on processing performance, package size and power consumption for a single device.  This is the application space where special function devices are adding value to high volume handset designs. 

From simple glue logic to system interfaces and bus conversion, low power CPLDs are making their way into high volume smart handset designs.  They are enabling feature enhancements as well as aiding system performance helping customers bring new models to market faster.  The growth is fueled by the emergence of new graphic requirements, diverse radio modems and expanded keypad functions.  Next generations handsets include hard disk drives, QWERTY keypads, removable memory interfaces, video and TV reception, and expanded display size and resolution.   More often then not, single processors cannot offer all these features.   Xilinx CPLDs can often assist single processor engines and provide the performance needed to address these features with little incremental power consumption and high speed performance.

Applications notes corresponding to above block diagram

Special Functions
XAPP 512 - Implementing keypad scanner with CoolRunner-II CPLDs(PDF)
XAPP 785 - Level Translation using CoolRunner-II(PDF)
XAPP 905 - Using CoolRunner-II CPLDS with other processor chipsets(PDF)
XAPP 805 - Driving LEDs with CoolRunner-II CPLDS(PDF)
XAPP 355 - Serial ADC interface using a CoolRunner CPLD(PDF)

Memory
XAPP 398 - Compact flash card interface for CoolRunner-II CPLDS(PDF)
XAPP 394 - Interfacing to mobile SDRAM with CoolRunner-II CPLDs(PDF)
XAPP 354 - Using Xilinx CPLDs to interface to a NAND flash memory device(PDF)

Peripheral interfaces
XAPP 390- Design of a digital camera with CoolRunner-II CPLDs(PDF)
XAPP 341- UARTs in CPLDs(PDF)
XAPP 910 - Timer Resolution with CoolRunner-II CPLDs(PDF)
XAPP 372 - CoolRunner-II Smartcard reader(PDF)
XAPP 348 – CoolRunner Serial Peripheral interface master(PDF)
XAPP 345 - IrDA and UART interface(PDF)
XAPP 353 - CoolRunner SMBus controller(PDF)

Power consumption
XAPP 347- Decrease Processor power consumption using a CoolRunner-II CPLD(PDF)
XAPP 317- Power evaluation equation for CoolRunner-II CPLDs(PDF)
XAPP 377- low power designs with CoolRunner-II CPLDs(PDF)

Small Form Factor Packaging
XAPP 804 - CoolRunner-II Chip Scale Packages(PDF)
XAPP 439 – PCB pad and surface mount considerations for QFN packages (PDF)

 Documentation
Xilinx CPLD web page
CoolRunner-II data sheets
Programmable Logic Design Quick Start Handbook(PDF)

Design Software and Starter Kits
Xilinx WebPACK™ design tool
Xilinx logic consolidator tool
Xilinx CPLD design kit
Handset design platform documentation

Ordering information
Nu Horizons CPLD landing page
Avnet
Xilinx Online Store