Embedded Systems Conference Silicon Valley 2007
Xilinx Hands-On Workshops, at No Cost to You
Xilinx Show Activity
Attendees can register for one of several different on-site workshop waitlists where you can get hands-on experience building basic embedded systems based on the flexible MicroBlaze soft processor core, the high performance PowerPC hard processor core, or even Digital Signal Processing. Visit Xilinx at our registration desk in booth #724 to be added to the wait-list for these popular workshops.
Tuesday, April 3:
Time: |
Title: |
Instructor: |
| 9:00 am - 10:30 am | Build a customized DSP/ Microprocessing systems tailored for your application - 1A | Derek Palmer |
| 12:30 pm- 2:00 pm | Build a customized DSP/ Microprocessing systems tailored for your application - 1B | Derek Palmer |
| 2:30 pm - 4:00 pm | Build a customized DSP/ Microprocessing systems tailored for your application - 1C | Derek Palmer |
| 4:30 pm - 6:00 pm | Build a customized DSP/ Microprocessing systems tailored for your application - 1D | Derek Palmer |
Wednesday, April 4:
Workshop #2 - MicroBlaze/Spartan-3E
Time: |
Title: |
Instructor: |
| 10:00 am - 11:30 am | Build a Custom MicroBlaze Processing System and uClinux Kermel in Minutes - 2A | Navanee Sundaramoorthy |
| 12:00 pm - 1:30 pm | Build a Custom MicroBlaze Processing System and uClinux Kermel in Minutes - 2B | Navanee Sundaramoorthy |
| 2:00 pm - 3:30 pm | Build a Custom MicroBlaze Processing System and uClinux Kermel in Minutes - 2C | Navanee Sundaramoorthy |
| 4:00 pm - 5:30 pm | Build a Custom MicroBlaze Processing System and uClinux Kermel in Minutes - 2D | Navanee Sundaramoorthy |
Thursday, April 5:
Workshop #3 - PowerPC/Virtex-4
Time: |
Title: |
Instructor: |
| 9:00 am - 10:30 am | Implementing a PowerPC System with Floating Point Co-Processor on the Virtex™-4 FPGA - 3A | Glenn Steiner |
| 11:00 am - 12:30 pm | Implementing a PowerPC System with Floating Point Co-Processor on the Virtex™-4 FPGA - 3B | Glenn Steiner |
| 1:00 am - 2:30 pm | Implementing a PowerPC System with Floating Point Co-Processor on the Virtex™-4 FPGA - 3C | Glenn Steiner |
Detailed Workshop Information:
Workshop # 1 - April 3 | 9 am, 12:30 pm , 2:30 pm & 4:30 pm
Build Customized DSP/Microprocessing Systems Tailored for Your Application
A high performance pipelined DSP system benefits greatly from the addition of an embedded processor. The performance of a DSP system is affected greatly by filter coefficients. Utilizing a microprocessor these can be updated dynamically to improve the overall system quality while maintaining the high performance of a pipelined DSP hardware design. Allowing this data to be updated through software provides an extremely efficient way to refine DSP algorithms without wasting valuable engineering time iterating your DSP hardware design. Additionally, these kinds of systems can be easily upgraded to suit multiple product lines or installation environments. In this workshop exercise, you will implement a portion of a Video over Ethernet (VOE) IP Camera System design solution, which will be created using System Generator. You will also learn about Xilinx's MicroBlaze soft processor core and utilize a C programming model to interface to a custom designed DSP hardware system.
Workshop # 2 - April 4 | 10 am., 12:00 pm, 2:00 pm & 4:00 pm
Build a Custom MicroBlaze Processing System and μClinux Kernel in Minutes
In this 90 minute hands-on workshop, you will learn how to build a customized MicroBlaze hardware system targeting networking applications using the Xilinx Platform Studio tool suite. This session includes customizing various MicroBlaze soft processor features, selecting the right set of configurable I/O peripherals like Ethernet and also implementing the design on a Spartan-3E 1600E Platform FPGA development board. You will then create a uClinux BSP tailored to the hardware system using Platform Studio, configure the kernel with a TCP/IP stack using standard Linux configuration tools and build the kernel image. Finally you will download both the MicroBlaze hardware and uClinux software onto the board, boot the kernel and test drive the IP networking. NOTE: In every session, there will be a free giveaway of a Spartan-3E 1600E MicroBlaze development kit and a uClinux getting started resource DVD.
Workshop # 3 - April 5 | 9:00 am, 11:00 am & 1:00 pm
Implementing a PowerPC System with Floating Point Co-Processor on the Virtex™-4 FX FPGA
In this 90 minute hands-on workshop you will have the opportunity to experience the ease of creating a PowerPC system with floating point coprocessor using Xilinx Platform Studio (XPS). First, we will review the PowerPC system architecture and the Xilinx solutions for system implementation and debug. Next we will explore the value of coprocessor acceleration and see live demonstrations of software acceleration via coprocessor accelerations. Via the hands-on workshop you will have the opportunity to build a PowerPC system with XPS Base System Builder and run a software based FIR filter. Next, you will add the Xilinx floating point unit and experience the 20 times acceleration provided by the coprocessor. The implemented system illustrates how users may easily connect the PowerPC to user or 3rd party IP for hardware acceleration of software. NOTE: In every session, there will be a free drawing of a PowerPC Virtex-4 FX12 development kit.
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HANDS-ON WORKSHOPS | TECHNICAL PAPERS