Product|ipcenter

/csi/ip.htm
 

Home : Products & Services : Intellectual Property : 4.x CORE Generator & IP Updates


4.x CORE Generator & IP Updates

   
Cores Available in 4.2i IP Update #2

Memories & Storage Elements

Math Functions

Digital Signal Processing

Basic Elements

Communications & Networking

Video & Image Processing

 
Memories & Storage Elements

pdfContent Addressable Memory (CAM) (V3.0)  

pdfAsynchronous_FIFO (V4.0)

pdfSynchronous FIFO (V3.0) 

pdfDistributed Memory(V5.1)  

pdfDual-Port Block Memory (V4.0)  

pdfSingle-Port Block Memory (V4.0)

Digital Signal Processing

pdfCascaded Integrator-Comb(CIC) Filter (V3.0) 

pdfBit Correlator (V3.0)

pdfDigital Down Converter (DDC) (V1.0)

pdfDistributed Arithmetic FIR Filter (V7.0)

pdfDirect Digital Synthesizer (DDS) (V4.1) 

pdfLFSR (V2.0) 

pdfMAC FIR (V1.0)

pdf1-D Discrete Cosine Transform (DCT) (V2.1) 

pdf2-D Discrete Cosine Transform (DCT) (V2.0)

Communications & Networking

pdf8B/10b Encoder (V3.0) 

pdf8b/10b Decoder (V4.0) 

pdfConvolutional Encoder (V2.0)

Math Functions

pdfSine/Cosine Look Up Table (V4.1) 

pdfPipelined Divider (V2.0)

pdfMultiply Accumulator (V2.0)

pdfMultiply Generator (V5.0) 

pdfAccumulator (V5.0) 

pdfAdder/Subtracter (V5.0) 

pdfTwos Complementer (V5.0)

Basic Elements 

pdfComparator (V5.0) 

pdfBinary Counter (V5.0) 

pdfBinary Decoder (V5.0) 

pdfBit Bus Gate (V5.0) 

pdfBit Gate (V5.0) 

pdfBus Gate (V5.0) 

pdfBit Multiplexer (V5.0

pdfBus Multiplexer (V5.0) 

pdfBUFE-based Multiplexer Slice (V5.0) 

pdfBUFT-based Multiplexer Slice (V5.0) 

pdfFD-based Parallel Register (V5.0) 

pdfLD-based Parallel Latch (V5.0) 

pdfFD-based Shift Register (V5.0) 

pdfRAM-based Shift Register (V5.0) 

pdfLFSR (V2.0)

Video & Image Processing

pdf1-D Discrete Cosine Transform (DCT) (V2.1) 

pdf2-D Discrete Cosine Transform (DCT) (V2.0)

Comments, Questions, or Problems? Please E-mail coregen@xilinx.com or enter a Web case.

 
   
/csi/footer.htm