ISE CORE Generator IP Updates
Key Documentation
Quick Links
New Device Family Support
General Access to Kintex™-7 and Virtex®-7 Low Voltage device support, Limited Access support for Artix™-7 and Virtex-7 XT devices
- Limited Access support for the Artix-7 and Virtex-7 XT device families has been added to a selection of cores in this release. CORE Generator IP providing Limited Access support for Artix-7 and Virtex-7 XT devices display a life cycle status of "Beta" in ISE.
- For a comprehensive listing of IP cores supporting these new device families, click the "IP in this Release" tab at http://www.xilinx.com/ipcenter/coregen/updates_13_3.htm.
AXI4 Support
New AXI4 IP
This release of Xilinx CORE Generator includes 42 IP cores with AXI4 support.
For a full listing of Xilinx AXI4 IP see www.xilinx.com/ipcenter/axi4_ip.htm
For more information on AXI4 at Xilinx see www.xilinx.com/ipcenter/axi4.htm
New IP Cores
The release also includes the following new LogiCORE IP:
- Audio, Video & Image Processing
- Bus Interface and IO
- Communications and Networking
- Embedded Processing
- AXI XADC **
- FPGA Features and Debug
- Interconnect Infrastructure
* Included at no additional charge with ISE
**Included at no additional charge with EDK
Updated IP Cores
The release also includes updates to these other popular IP cores:
- Building Block IP
- Architecture Wizards*
- Block Memory Generator*
- FIFO Generator*
- Memory Interface Generator (MIG)*
- Connectivity
- PCI
- PCI Express
- DSP Building Block IP
- Floating Point Operator*
- FFT*
*Included at no additional charge with ISE
| New Cores | Additional License Required | Datasheet (PDF) | AXI4 | Artix-7** | Spartan-3E | Extended Spartan-3A Families | Spartan-6 | Virtex-4 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-XT** | Kintex-7 | Release Note (PDF) | ||
| Audio, Video & Image Processing | ||||||||||||||||
| Chroma Resampler v1.0 |  |
PG012 (AXI) | AXI4-Lite | |
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XTP025 | |||||||||
| Communications & Networking | ||||||||||||||||
| JESD204 v1.0 | |
DS814 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | |||||||||
| Embedded Processing | ||||||||||||||||
| AXI XADC v1.00a | PG019 (AXI) | AXI4-Lite | |
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XTP025 | |||||||||
| FPGA Features & Debug | ||||||||||||||||
| ChipScope IBERT for Virtex-7 GTX v2.00a | DS867 | |
XTP025 | |||||||||||||
| Interconnect Infrastructure | ||||||||||||||||
| AXI Datamover v3.00a | PG022 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | |||||||||
| Standard Bus Interface | ||||||||||||||||
| Serial RapidIO Gen 2 v1.2 | |
PG007 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | ||||||||
| New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Artix-7** | Spartan-3E | Extended Spartan-3A Families | Spartan-6 | Virtex-4 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-XT** | Kintex-7 | Release Note (PDF) | ||
| Audio, Video & Image Processing | ||||||||||||||||
| AXI Video DMA (v4.00a) | PG020 (AXI) | AXI4
AXI4-Stream AXI4-Lite |
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XTP025 | |||||||||
| Color Correction Matrix (v3.0) | |
PG001 (AXI) | AXI4-Lite | |
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XTP025 | ||||||
| Color Filter Array Interpolation (v4.0) | |
PG002 (AXI) | AXI4-Lite | |
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XTP025 | ||||||
| Deinterlacer (v1.0) | |
PG017 (AXI) | AXI4-Lite | |
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XTP025 | |||||||||
| Defective Pixel Correction (v4.0) | |
PG005 (AXI) | AXI4-Lite | |
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XTP025 | ||||||
| Gamma Correction (v4.0) | |
PG004 (AXI) | AXI4-Lite | |
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XTP025 | ||||||
| Image Characterization (v2.0) | |
PG015 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | ||||||
| Image Edge Enhancement (v3.0) | |
PG003 (AXI) | AXI4-Lite | |
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XTP025 | ||||||
| Image Noise Reduction (v3.0) | |
PG011 (AXI) | AXI4-Lite | |
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XTP025 | ||||||
| Image Statistics Engine (v3.0) | |
PG008 (AXI) | AXI4-Lite | |
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XTP025 | ||||||
| Motion Adaptive Noise Reduction (v3.0) | |
PG006 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | ||||||
| Object Segmentation (v2.0) | |
PG018 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | ||||||||
| On-Screen Display (v3.0) | |
PG010 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | ||||||
| RGB to YCrCb Color-Space Converter (v4.0) | PG013 | |
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XTP025 | ||||||||
| Video Scaler (v5.0) | |
PG009 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | ||||||
| YCrCb to RGB Color-Space Converter (v4.0) | PG014 | |
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XTP025 | ||||||||
| Automotive & Industrial | ||||||||||||||||
No updates were shipped for Automotive & Industrial cores |
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| Basic Logic | ||||||||||||||||
| RAM-based Shift Register (v11.0) | DS228 | |
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XTP025 | ||||
| Communications & Networking | ||||||||||||||||
| Aurora | Additional License Required | Datasheet (PDF) | AXI4 | Artix-7** | Spartan-3E | Extended Spartan-3A Families | Spartan-6 | Virtex-4 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-XT** | Kintex-7 | Release Note (PDF) | ||
| Aurora 8B/10B (v7.1) | DS797(AXI) | AXI4-Stream | |
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XTP025 | ||||||||
| Ethernet | ||||||||||||||||
| 10 Gigabit Ethernet Media Access Controller (10GEMAC) (AXI v11.2 / v10.1 non-AXI) | |
DS813 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | ||
| 10 Gigabit Ethernet PCS/PMA (10GBASE-R) (v2.2) | DS739 | |
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XTP025 | |||||||||||
| Virtex-6 Embedded Tri-Mode Ethernet MAC Wrapper (AXI v2.2 / V1.4 non-AXI) | DS835 (AXI) | AXI4-Stream
AXI4-Lite |
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XTP025 | ||||||||||||
| Error Correction | ||||||||||||||||
| Convolutional Encoder (v7.0) | DS248 | |
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XTP025 | ||||
| Interleaver/De-Interleaver (v7.0) | |
DS861 (AXI) | AXI4-Stream | |
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XTP025 | ||
| Reed-Solomon Decoder (v8.0) | |
DS862 (AXI) | AXI4-Stream | |
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XTP025 | ||
| Reed-Solomon Encoder (v7.1) | |
DS251 | |
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XTP025 | |||
| Viterbi Decoder (v7.0) | |
DS247 | |
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XTP025 | |||
| Telecommunications | ||||||||||||||||
| SPI-4.2 (v10.5 / v11.2 AXI) | |
DS823 (AXI) | |
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XTP025 | |||||||
| Wireless | Additional License Required | Datasheet (PDF) | AXI4 | Artix-7** | Spartan-3E | Extended Spartan-3A Families | Spartan-6 | Virtex-4 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-XT** | Kintex-7 | Release Note (PDF) | ||
| 3GPP LTE Channel Estimator(v1.1) | |
XMP119 | AXI4-Stream | |
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XTP025 | |||||||
| 3GPP LTE Fast Fourier Transform (v1.0) | |
XMP125 | |
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XTP025 | |||||||
| 3GPP LTE DL Channel Encoder (v2.1) | |
XMP023 | |
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XTP025 | |||||||
| 3GPP LTE UL Channel Decoder (v3.0) | |
PB005 (AXI) | AXI4-Stream | |
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XTP025 | ||||||
| 3GPP LTE PUCCH Receiver (v1.0) | |
XMP156 | |
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XTP025 | |||||||||
| 3GPP LTE RACH Detector (v1.0) | |
XMP041 | |
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XTP025 | ||||||
| 3GPP LTE Turbo Encoder (v3.1) | |
DS701 | |
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XTP025 | |||||
| 3GPP LTE Turbo Decoder (v2.0) | |
XMP020 | |
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XTP025 | |||
| Digital Signal Processing | ||||||||||||||||
| Additional License Required | Datasheet (PDF) | AXI4 | Artix-7** | Spartan-3E | Extended Spartan-3A Families | Spartan-6 | Virtex-4 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-XT** | Kintex-7 | Release Note (PDF) | |||
| CIC Compiler (v3.0) | DS845 (AXI) | AXI4-Stream | |
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XTP025 | |||
| CORDIC (v5.0) | DS858 (AXI) | AXI4-Stream | |
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XTP025 | |||
| DDS Compiler (v4.0 / AXI v5.0) | DS794 (AXI) | AXI4-Stream | |
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XTP025 | |||
| DSP48 Macro (v2.1) | DS754 | |
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XTP025 | ||||
| Fast Fourier Transform (FFT) (v7.1 / AXI v8.0) | DS808 (AXI) | AXI4-Stream | |
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XTP025 | |||
| FIR Compiler (v5.0 / AXI v6.3) | DS795 (AXI) | AXI4-Stream | |
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XTP025 | |||
| Embedded Processing | ||||||||||||||||
| AXI Central DMA Controller (v3.02a) | DS792 | AXI4
AXI4-Lite |
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XTP025 | ||||||||||
| AXI PCIe (v1.01a) | DS820 | AXI4 | |
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XTP025 | |||||||||
| FPGA Features & Design | ||||||||||||||||
| Additional License Required | Datasheet (PDF) | AXI4 | Artix-7** | Spartan-3E | Extended Spartan-3A Families | Spartan-6 | Virtex-4 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-XT** | Kintex-7 | Release Note (PDF) | |||
| 7 Series FPGAs Transceiver Wizard (v1.5) | UG769 | |
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XTP025 | |||||||||||
| Soft Error Mitigation (SEM) (v3.1) | DS796 | |
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XTP025 | ||||||||||
| Spartan-6 FPGA GTP Transceiver Wizard (v1.11) | UG546 | |
XTP025 | |||||||||||||
| Virtex-6 FPGA GTH Transceiver Wizard (v1.9) | UG691 | |
XTP025 | |||||||||||||
| Virtex-6 FPGA GTX Transceiver Wizard (v1.11) | UG516 | |
XTP025 | |||||||||||||
| Interconnect Infrastructure | ||||||||||||||||
| AXI Bus Functional Model (AXI-BFM) (v2.1) | DS824 | AXI4
AXI4-Stream AXI4-Lite AXI3 |
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XTP025 | |||||||
| AXI DMA Controller (v5.00a) | PG021 | AXI4
AXI4-Stream AXI4-Lite |
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XTP025 | |||||||
| AXI Interconnect (v1.04a) | DS768 | AXI4
AXI4-Lite AXI3 |
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XTP025 | |||||
| Math Functions | ||||||||||||||||
| Additional License Required | Datasheet (PDF) | AXI4 | Artix-7** | Spartan-3E | Extended Spartan-3A Families | Spartan-6 | Virtex-4 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-XT** | Kintex-7 | Release Note (PDF) | |||
| Accumulator (v11.0) | DS213 | |
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XTP025 | ||||
| Adder Subtracter (v11.0) | DS214 | |
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XTP025 | ||||
| Binary Counter (v11.0) | DS215 | |
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XTP025 | ||||
| Complex Multiplier (AXI v4.0 / v3.1 non-AXI) | DS793 (AXI) | AXI4-Stream | |
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XTP025 | |||
| Divider Generator (AXI v4.0 / V3.0 non-AXI) | DS819 (AXI) | AXI4-Stream | |
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XTP025 | |||
| Floating Point Operator (AXI v6.0 / v5.0 non-AXI) | DS816 (AXI) | AXI4-Stream | |
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XTP025 | |||
| Multiplier (v11.2) | DS255 | |
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XTP025 | ||||
| Multiply Accumulator (v2.0) | DS716 | |
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XTP025 | ||||
| Multiply Adder (v2.0) | DS717 | |
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XTP025 | |||||
| Memories & Storage Elements | ||||||||||||||||
| Block Memory Generator (v6.2) | DS512 (AXI) | AXI4
AXI4-Lite |
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XTP025 | |||
| Distributed Memory Generator (v6.2) | DS322 | |
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XTP025 | ||||
| FIFO Generator (v8.3) | DS317 (AXI) | AXI4
AXI4-Stream AXI4-Lite |
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XTP025 | |||
| Memory Interface Generator (MIG) (v3.9 / 7 Series v1.3) | MIG | AXI4 | |
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XTP025 | |||
| Standard Bus Interfaces | ||||||||||||||||
| PCI® | Additional License Required | Datasheet (PDF) | AXI4 | Artix-7** | Spartan-3E | Extended Spartan-3A Families | Spartan-6 | Virtex-4 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-XT** | Kintex-7 | Release Note (PDF) | ||
| 32-bit Initiator/Target for PCI (v4.15) | |
DS206 | |
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XTP025 | |||||||||
| 32-bit Initiator/Target for PCI (v3.0) Build 167 | |
DS206 | |
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XTP025 | ||||||||||
| 64-bit Initiator/Target for PCI (v4.15) | |
DS205 | |
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XTP025 | |||||||||
| 64-bit Initiator/Target for PCI (v3.0) Build 167 | |
DS205 | |
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XTP025 | ||||||||||
| PCI Express® | ||||||||||||||||
| 7 Series Integrated Block for PCI Express (PCIe) (v1.2) | DS821 | |
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XTP025 | ||||||||||||
| RapidIO | ||||||||||||||||
| RapidIO Physical Layer Interface Core (v5.6) | |
DS696 | |
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XTP025 | |||||||||
| RapidIO Logical (I/O) and Transport Layer Interface Core (v5.6) | |
DS696 | |
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XTP025 | |||||||||
*Included with ISE, but requires installation of an electronic license key
**Beta support. Contact your Xilinx FAE to request the required license key.
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