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10 Gigabit Ethernet PCS/PMA with FEC/Auto-Negotiation for backplanes (10GBASE-KR) IP Evaluation

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Xilinx supports Full System Hardware Evaluation of the 10GBASE-KR LogiCORE™ IP core.

 

The evaluation license key for this core will enable you to parameterize, generate and instantiate this IP in your design. It will also allow you to perform functional and timing simulation, generate a bitstream, and download and configure your design in hardware. The resulting IP will be fully functional in the FPGA for 2-3 hours, after which it will cease to function. To restore the evaluation core's operation in your design, simply reconfigure the FPGA with the bitstream.

Requirements

Please refer to the Xilinx 10GBASE-KR Offerings and Software Requirements Schedule for details on System Requirements for these cores.

License Terms

Please note that the conditions of the Core Evaluation License Agreement apply toward your evaluation of this core.

Registration Instructions
  • Access to the 10GBASE-KR Evaluation core is available to approved customers
  • Customers interested in evaluating this core must register to evaluate the 10GBASE-KR IP Core. Your evaluation request will be reviewed by Xilinx IP Marketing
  • All required fields in the web registration form must be filled in accurately.The email address associated with your Xilinx.com account must also be a valid company email address in order for your registration to be approved.
  • Xilinx reserves the right to decline evaluation requests for these cores

 

Accessing Evaluation Files

To perform a Full System Hardware Evaluation:

  1. Make sure you have satisfied the requirements.
  2. Register to request evaluation of the 10GBASE-KR IP core. Xilinx IP Marketing will review your request.
  3. After receiving approval, you will receive instructions by email within 2 business days, from Xilinx Customer Service on how to generate the Evaluation License key on the Xilinx Product Licensing site at www.xilinx.com/getlicense.
Note that the evaluation cores will cease to function in the programmed device after 8 hours.
Generating the Core
  • Start the CORE Generator™ software using either of the following methods:
    • From ISE: Select Projects -> New Source -> IP (CORE Generator and Architecture Wizard)
    • From Windows: Select All Programs -> Xilinx ISE -> Accessories -> CORE Generator
  • Locate your core in the IP catalog section of the CORE Generator window.
    • Double click on the core to call up the customization GUI, select your desired parameters and click the "Finish" button to generate the core.
Release Notes and Known Issues
 
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