Summary
Xilinx provides a full system hardware evaluation of the IP core.
After filling out the evaluation request form, you will be able
to download the evaluation core. You will be able to parameterize,
generate and instantiate this IP in your design. You will be able
to perform functional and timing simulation and download and configure
your design in hardware. The evaluation license allows for a bitstream
to be generated. The resulting IP will be fully functional for 2-3
hours. After which time, the IP will time out and you will need
to download and configure the FPGA again.
Evaluation License This 90 days evaluation file is compatible with all versions of the DVB-S.2 FEC IP.
Summary