3GPP LTE Channel Estimator IP Evaluation

Xilinx supports Full System Hardware Evaluation of the 3GPP LTE Channel Estimator LogiCORE™ IP core.

 

The evaluation license key for this core will enable you to parameterize, generate and instantiate this IP in your design. It will also allow you to perform functional and timing simulation, generate a bitstream, and download and configure your design in hardware. The resulting IP will be fully functional in the FPGA for 2-3 hours, after which it will cease to function. To restore the evaluation core's operation in your design, simply reconfigure the FPGA with the bitstream.

Requirements

Please refer to the Xilinx 3GPP LTE Channel Estimator Offerings and Software Requirements Schedule for details on System Requirements for these cores.

License Terms

Please note that the conditions of the Core Evaluation License Agreement apply toward your evaluation of this core.

Registration Instructions
  • Access to the 3GPP LTE Channel Estimator Evaluation core is available to approved customers
  • Customers interested in evaluating this core must register for access to the 3GPP LTE Channel Estimator Evaluation Lounge. Your evaluation request will be reviewed by Xilinx IP Marketing
  • All required fields in the web registration form must be filled in accurately.The email address associated with your Xilinx.com account must also be a valid company email address in order for your registration to be approved.
  • Xilinx reserves the right to decline evaluation requests for these cores

 

 

Accessing Evaluation Files

To perform a Full System Hardware Evaluation:

  1. Make sure you have satisfied the requirements.
  2. Register to request access to the 3GPP LTE Channel Estimator Evaluation Lounge. Xilinx IP Marketing will review your request.
  3. Upon receiving approval, log into the Evaluation Member Lounge to access the data sheet and Bit Accurate C-Model. You will also receive instructions by email from Xilinx Customer Service on how to generate an Evaluation License key on the Xilinx Product Licensing site at www.xilinx.com/getproduct.

Note that the evaluation cores will cease to function in the programmed device after 2-3 hours.
Generating the Core

You can customize the IP for use in our design by specifying values for the various parameters associated with the IP core using the following steps:

  • Select the IP from the catalog
  • Double-click the selected IP or select the Customize IP command from the toolbar or popup menu.

For details, see the sections, “Working with IP” and “Customizing IP for the Design” in the Vivado Design Suite User Guide: Designing with IP (UG896) and the “Working with the Vivado IDE” section in the Vivado Design Suite User Guide: Getting Started (UG910).

Release Notes and Known Issues

For information on New Features, Known Issues, and Patches please refer to the Installation, Licensing and release Notes document available on this page: http://www.xilinx.com/support/licensing_solution_center.htm

 
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