| Summary |
|
The Xilinx® CPRI IP core is delivered in source code
format.
|
| Requirements |
ISE® IP Update 10.1.0
Please refer to the ISE
IP Updates System Requirements page for software requirements
information for this release, and to the ISE
IP Updates Installation Instructions page for general
installation instructions
(NOTE: You must be registered on Xilinx.com to access
these updates.) |
| License Terms |
| Please note that the conditions of the
Xilinx Core
Evaluation License Agreement apply toward your evaluation
of this core. |
| Accessing
the Evaluation Files |
|
To perform a Hardware Evaluation:
- Contact your Xilinx FAE to request access to this core
for Evaluation.
- Once approved by Xilinx IP Marketing, you will receive
an Evaluation License Agreement.
- Fill out and sign the agreement and fax it to your FAE.
Keep a signed copy for your own records
- Once the Evaluation License Agreement has been approved,
you will receive an Evaluation License Key by email,
good for 90 days. Install the license key as directed
by the email instructions.
- Make sure you have satisfied the requirements.
- Follow the general instructions below on Generating
the Core.
- To perform an in-depth evaluation in hardware in your
own design:
- Instantiate the core in your own design, place and route
the design using ISE, then generate a bitstream and use
it to program an appropriate FPGA device.
- Upon termination of the evaluation period, you must destroy
all supplied data files and design files, including the
whole or parts of the LogiCORE IP product and all copies thereof.
| Note that the core will cease to function in the programmed
device after about 8 hours. |
|
| Generating
the Core |
- Start the CORE Generator™ software using either of the following
methods:
- From ISE: Select Projects -> New Source
-> IP (Coregen and Architecture Wizard)
- From Windows: Select Programs -> Xilinx
-> Accessories -> CORE Generator
- The CPRI core is located in the Communication and
Networking folder in the IP catalog section of the
CORE Generator window.
Refer to the Example Design Quick Start chapter of the Getting
Started Guide for more detailed instructions on evaluating
the core.
|
| Release Notes &
Known Issues |
|
Please review the Master Release Notes Guide for Xilinx IP Cores |
| Learn More |
You can learn more about the Xilinx CPRI
LogiCORE IP by visiting the product
page
|