3GPP LTE Channel IP Evaluation
Xilinx supports Full System Hardware Evaluation of the 3GPP LTE UL Channel Decoder and 3GPP LTE DL Channel Encoder LogiCORE™ IP cores.
The evaluation license keys for these cores will enable you to parameterize, generate and instantiate this IP in your design. They will also allow you to perform functional and timing simulation, generate a bitstream, and download and configure your design in hardware. The resulting IP will be fully functional in the FPGA for 2-3 hours, after which it will cease to function. To restore the evaluation core's operation in your design, simply reconfigure the FPGA with the bitstream.
Registration Instructions
- Access to the 3GPP LTE UL Channel Decoder and 3GPP LTE DL Channel Encoder Evaluation cores is available to approved customers
- Customers interested in evaluating these cores must register for access to the 3GPP LTE Channel Evaluation Lounge. Your evaluation request will be reviewed by Xilinx IP Marketing
- All required fields in the web registration form must be filled in accurately.The email address associated with your Xilinx.com account must also be a valid company email address in order for your registration to be approved.
- Xilinx reserves the right to decline evaluation requests for these cores
Accessing Evaluation Files
To perform a Full System Hardware Evaluation:
- Make sure you have satisfied the requirements.
- Register
to request access to the 3GPP LTE UL Channel Decoder and/or the 3GPP LTE DL Channel Encoder Evaluation Lounge. Xilinx
IP Marketing will review your request.
- Upon receiving approval, log into the Evaluation Member Lounge to access the data sheet, C-Model, and C-Model User Guide. You will also receive instructions by email from Xilinx Customer Service on how to generate an Evaluation License key on the Xilinx Product Download and Licensing site at www.xilinx.com/getproduct.
| Note that the evaluation cores will cease to function in the programmed
device after 2-3 hours. |
Generating the Core
- Start the CORE Generator™ software using either of the following
methods:
- From ISE: Select Projects -> New Source
-> IP (CORE Generator and Architecture Wizard)
- From Windows: Select All Programs -> Xilinx
ISE -> Accessories ->
CORE Generator
- The 3GPP LTE Turbo cores are located in the Communication and Networking folder in the IP catalog section of the CORE Generator window, under the Error Correction subfolder.
Release Notes and Known Issues