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3GPP Mixed Mode Turbo Decoder IP Evaluation

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Xilinx supports Full System Hardware Evaluation of the 3GPP Mixed Mode Turbo Decoder LogiCORE™ IP core.

 

The evaluation license key for this core will enable you to parameterize, generate and instantiate this IP in your design. It will also allow you to perform functional and timing simulation, generate a bitstream, and download and configure your design in hardware. The resulting IP will be fully functional in the FPGA for 2-3 hours, after which it will cease to function. To restore the evaluation core's operation in your design, simply reconfigure the FPGA with the bitstream.

Requirements

Please refer to the Xilinx 3GPP Mixed Mode Turbo Decoder Offerings and Software Requirements Schedule for details on System Requirements for these cores.

License Terms

Please note that the conditions of the Turbo Codes LogiCORE IP Evaluation License Terms apply toward your evaluation of this core.

Registration Instructions
  • Access to the 3GPP Mixed Mode Turbo Decoder Evaluation core is available to approved customers
  • Customers interested in evaluating this core must register for access to the 3GPP Mixed Mode Turbo Decoder Evaluation Lounge. Your evaluation request will be reviewed by Xilinx IP Marketing
  • All required fields in the web registration form must be filled in accurately.The email address associated with your Xilinx.com account must also be a valid company email address in order for your registration to be approved.
  • Xilinx reserves the right to decline evaluation requests for these cores

 

Accessing Evaluation Files

To perform a Full System Hardware Evaluation:

  1. Make sure you have satisfied the requirements.
  2. Register to request access to the 3GPP Mixed Mode Turbo Decoder Evaluation Lounge. Xilinx IP Marketing will review your request.
  3. Upon receiving approval, log into the Evaluation Member Lounge to access the data sheet and Bit Accurate C-Model. You will also receive instructions by email from Xilinx Customer Service on how to generate an Evaluation License key on the Xilinx Product Licensing site at www.xilinx.com/getlicense.

Note that the evaluation cores will cease to function in the programmed device after 2-3 hours.
Generating the Core
  • Start the CORE Generator™ software using either of the following methods:
    • From ISE: Select Projects -> New Source -> IP (CORE Generator and Architecture Wizard)
    • From Windows: Select All Programs -> Xilinx ISE -> Accessories -> CORE Generator
  • This core is located in the Communication and Networking folder in the IP catalog section of the CORE Generator window, under the Error Correction or Telecommunications subfolders.
Release Notes and Known Issues
 
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