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MOST NIC IP Core Evaluation

Xilinx provides two ways to evaluate this LogiCORE™ IP core: Simulation Only, and Full System Hardware Evaluation.

 

  • Simulation Only Evaluation allows you to customize the core through a CORE Generator™ customization GUI and generate a UNISIM library-based structural model for functional simulation. (Available with the CORE Generator standalone version of this core only and is the default evaluation mode in CORE Generator)
  • A Full System Hardware Evaluation version of the core allows you to do everything you can do with the Fully Licensed IP core, including configure place and route, simulate, estimate timing and program a Xilinx FPGA device. For the EDK XPS version of the core this is the only evaluation mode.

 

Requirements

Please refer to the Requirements link on the product page for this core for details on System Requirements for the CORE Generator and EDK configurations of this core.

 

Before you can acquire a hardware evaluation license for the core, you must become a member of the MOST Cooperation.

License Terms

Please note that the conditions of the MOST LogiCORE IP Evaluation License Terms apply toward your evaluation of this core.

Accessing Evaluation Files
Simulation Only Evaluation

To perform a Simulation Only Evaluation:

Full System Hardware Evaluation

To perform a Full System Hardware Evaluation: The procedures are the same as for the Simulation Only Evaluation, except that for the CORE Generator configuration of the core, you must additionally request and install a Full System Hardware Evaluation license key. This will allow you to generate a bitstream that you can use to program a Xilinx FPGA and evaluate the core in hardware for a limited amount of time.

  1. Make sure you have satisfied the Requirements.
  2. Generate a Full System Hardware Evaluation License Key.
    • The license will be generated and emailed to you automatically. Install the license as directed by the email instructions.
  3. If you are evaluating the EDK/XPS configuration of the core, go directly to the General Instructions for EDK/XPS core.
  4. For the CORE Generator configuration of the core, follow the Installation Instructions in the ISE CORE Generator IP Update Install Instructions to install the required ISE® software and IP Update.

  5. Follow the general instructions below to load the CORE Generator IP customization GUI for this core and generate the core.
  6. For some cores, an Example Design is written to your project directory by CORE Generator system when you generate the core. If an example design is provided, instructions will be documented in a Getting Started Guide or User Guide document.
  7. To perform an in-depth evaluation in hardware in your own design:
    • Instantiate the core in your own design, place and route the design using ISE, then generate a bitstream and use it to program an appropriate FPGA device.
General Instructions for CORE Generator standalone core
  • Start up the CORE Generator using either of the following two methods:
    • From ISE®: Select Projects -> New Source -> IP (Coregen and Architecture Wizard)
    • From Windows: Select Programs -> Xilinx ISE -> Accessories -> CORE Generator
  • Locate your core the IP catalog section of the CORE Generator window.
    • Double click on the core to call up the customization GUI, select your desired parameters, and click the "Finish" button to generate the core.
General Instructions for XPS/EDK core

IP Evaluation license keys in EDK are pre-programmed with a 14-month evaluation period which starts from the official release date of your particular version of EDK. You can generate EDK systems containing these Full System Hardware Evaluation cores throughout the 14-month evaluation period. When programmed into an FPGA, the evaluation cores will operate for approximately 6-8 hours when running at the nominal clock frequency specified for the core.

 

To evaluate this core in EDK, simply:

  1. Make sure you have installed the latest version of EDK
  2. Download and install the latest EDK Service Pack from the Xilinx Download Center. Specify "EDK Service Pack" for the Download Type.
  3. You must also contact your local Xilinx Sales Office to request a Full System Hardware Evaluation License Key from your local FAE. When you receive the key, install it as directed by the instructions in the email you will receive.
  4. Refer to the EDK Getting Started Guide for general instructions on how to add the core into your EDK system and evaluate it.

After you purchase a license for the core, you will be able to generate a "Full" electronic license key for the latest released core version. Since the Full license key does not expire, installing it will enable you to generate new EDK systems containing the core version in question indefinitely. Systems containing the core generated with a Full license will not time out when programmed into an FPGA.

 

 

Release Notes & Known Issues

Please refer to the Master IP Release Note Guide for the latest information and Known Issues for this core.

 
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