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OBSAI LogiCORE IP Core Evaluation

Xilinx supports Full System Hardware Evaluation for this core

  • A Full System Hardware Evaluation version of the core allows you to do everything you can do with the Fully Licensed IP core, including configure place and route, simulate, estimate timing and program a Xilinx FPGA device.
Requirements

Please refer to the OBSAI LogiCORE™ IP Offerings and System Requirements Schedule for software requirements information for this product.

 

(NOTE: You must be registered on Xilinx.com to access these updates.)

License Terms

Please note that the conditions of the Core Evaluation License Agreement apply toward your evaluation of this core.

Full System Hardware Evaluatioin

To perform a Hardware Evaluation:

  1. Contact your Xilinx FAE to request access to this core for Evaluation.
  2. Once approved by Xilinx IP Marketing, you will receive an Evaluation License Agreement.
  3. Once the Evaluation License Agreement has been signed and approved, you will receive further instructions by email from Xilinx Customer Service. Follow those instructions to generate an Evaluation License key on the Xilinx Product Download and Licensing site at www.xilinx.com/getproduct.
  4. Make sure you have satisfied the requirements.
  5. Follow the general instructions below to load the CORE Generator™ IP customization GUI for this core and generate the core
  6. To perform an in-depth evaluation in hardware in your own design:
    • Instantiate the core in your own design, place and route the design using ISE, then generate a bitstream and use it to program an appropriate FPGA device.
  7. Upon termination of the evaluation period, you must destroy all supplied data files and design files, including the whole or parts of the LogiCORE IP product and all copies thereof.
Note

The evaluation core will cease to function in a programmed FPGA device after a period of time. See the Requirements page for this core for information on the duration of this time period.

General Instructions
  • Start up the CORE Generator using either of the following two methods:
    • From ISE: Select Projects -> New Source -> IP (Coregen and Architecture Wizard)
    • From Windows: Select Programs -> Xilinx ISE -> Accessories -> CORE Generator
  • Locate your core the IP catalog section of the CORE Generator window.
    • Double click on the core to call up the customization GUI, select your desired parameters, and click the "Finish" button to generate the core.

If available, refer to the Example Design Quick Start chapter of the Getting Started Guide for more detailed instructions on evaluating the core.

Release Notes & Known Issues

Please refer to the Master IP Release Note Guide for the latest information and Known Issues for this core.

 
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