Per the terms of the Xilinx membership in the MOST Cooperation, Xilinx may only license LogiCORE™ IP products based on the MOST NIC specifications to other members of the MOST Cooperation.
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To become a member, contact the MOST Cooperation at www.mostcooperation.com. In the event that you cease to be a member of the MOST Cooperation, the MOST NIC License Agreement that you accepted will automatically terminate. |
You must be a member of the MOST Cooperation prior to accepting the MOST License Agreements
| LogiCORE | Version | Software Requirements | Supported Device Families |
|---|---|---|---|
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v1.4 | ISE® 10.1 SP3 ISE IP Update 10.1.3 (IP_10.1.3)
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Spartan-6 LXT / LX Virtex-6 HXT / LXT / SXT Virtex®-6 XC Virtex-5 SXT / LXT Virtex-5 LX XA
Spartan®-6 XC / XA Spartan-3A DSP Spartan-3AN Spartan-3A XA Spartan-3E XA |
|
|
v1.03a
v1.00a
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ISE 12.4 EDK 12.4
ISE® 10.1 SP3 ISE IP Update 10.1.3 (IP_10.1.3)
EDK 10.1 SP3
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Virtex-4 FX / SX / LX
Spartan-6 Spartan-3AN Spartan-3A DSP / Spartan-3A Spartan-3A XA Spartan-3E XA Spartan-3E Spartan-3 Virtex-II Pro |
Download the required software from the Xilinx.com Downloads page.
Check the IP Release Notes Guide for information on any required patches.
* A Hardware Evaluation license for any of the IP cores above will enable you to parameterize, generate and instantiate these cores in your design. You will also be able to perform functional and timing simulation and generate a bitstream that you can use to download and configure your design in hardware.
The IP cores in this table will be fully functional in the programmed device for approximately 8 hours. After this time, the IP will "time out" (cease to function) and you will need to download and configure the FPGA again