| System
Requirements |
| LogiCORE |
Version |
Software Requirements |
Required Patches |
Supported Device Families |
| SPI-4.2 |
v9.3 |
ISE® 11.3 or higher
ISE IP Update 11.3 (IP_11.3) |
Check the IP Release Notes Guide for information on any required patches. |
Virtex®-6 LXT / SXT / HXT / -1L
Virtex-5 TXT / FXT / SXT / LXT
Virtex-5 LX
Virtex-4 FX / SX / LX
|
v6.3 |
ISE 8.2i SP1
ISE 8.2i IP
Update 1 |
Check the IP Release Notes Guide for information on any required patches. |
Virtex-II Pro
Virtex-II |
| SPI-4.2 Lite |
v5.1 |
ISE® 11.2 or higher
ISE IP Update 11.2 (IP_11.2) |
Check the IP Release Notes Guide for information on any required patches. |
Virtex-6 LXT / SXT
Virtex-5 LXT / LX
Virtex-4 FX / SX / LX
Spartan®-6 LX LXT
Spartan-3E
Spartan-3A / 3AN
Spartan-3
Spartan-3A DSP |
v4.3
rev 1 |
ISE 10.1 SP2
ISE IP Update 10.1.2 |
Check the IP Release Notes Guide for information on any required patches. |
Virtex-II Pro
Virtex-II |
Hardware Evaluation Time Out Period
A Hardware Evaluation license for the above LogiCORE™ IP cores will enable you to parameterize, generate and instantiate this cores in your design. You will also be able to perform functional and timing simulation and generate a bitstream that you can use to download and configure your design in hardware.
The IP cores will be fully functional in the programmed device for approximately 8 hours. After this time, the IP will "time out" (cease to function) and you will need to download and configure the FPGA again |
Download the software requirements from the Software Updates page if you have not already done so. |