EDA Solutions Partners

For support on a specific EDA member product, contact that member directly

• System-Level design
• Design creation
• Synthesis
• Verification
• Board-level design
• ASIC prototyping

Alliance Program Partner	System-Level Design	Design Creation	Synthesis	Verification	Board-Level Design	ASIC Prototyping
Aldec, Inc.
Agilent Technologies
Atrenta. Inc.
Blue Pearl
Cadence Design Systems, Inc.
FlexRas Technologies
The Mathworks
Mentor Graphics
National Instruments
Synopsys

Table 1. System-Level Design
Alliance Partner Program	Product Name	Design Solution
Agilent	SystemVue FPGA	High-level design tool
The Mathworks	HDL Coder	High-level design tool
Mentor Graphics	Visual Elite HDL	High-level design tool
National Instruments	LabVIEW	High-level design tool
Synopsys	Synphony Model Compiler	High-level design tool

Table 2. Design Creation
Company	Product Name	Design Solution
Mentor Graphics	HDL Designer	Project management, design entry, and analysis tool
Synopsys	Synphony Model Compiler	High-level design tool

Table 3. Synthesis
Company	Product Name	Design Solution
Mentor Graphics	Precision RTL	Logic synthesis
	Precision RTL Plus	Advanced logic synthesis
	Precision Physical	Timing closure tool
Synopsys	Synplify Pro	Logic synthesis
	Synplify Premier	Timing closure tool

Table 4. Verification
Company	Product Name	Design Solution
Aldec, Inc.	Aldec Active-HDL	Simulation
	Aldec Riveria-PRO	Simulation
	ALINT	Register transfer level (RTL) checker
Atrenta. Inc.	SpyGlass	RTL checker
	SpyGlass CDC	Clock domain crossing (CDC) verification
	SpyGlass Constraints	Constraints (SDC) generation and verification
Agilent	FGPA Development Solutions	High-level design tool
Blue Pearl
	Analyze RTL	RTL checker
	Create	Constraints generator
Cadence Design Systems, Inc.	Incisive Enterprise Simulator	Simulation
	Encounter Conformal Equivalence Checker	Formal verification
Mentor Graphics	ModelSim	Simulation
	Questa	Simulation
	Questa CDC	clock domain crossing verification
	Formal Pro	Equivalence checking
Synopsys	VCS	Simulation
	LEDA	RTL checker
	Identify	Integrated RTL debug
	Magellan	Functional verification

Table 5. Board-Level Design
Company	Product Name	Design Solution
Agilent Technologies	Advanced Design System	Signal integrity (SI) analysis
Cadence Design Systems, Inc.	Allegro FPGA System Planner	FPGA I/O planning
	OrCAD FPGA System Planner	FPGA I/O planning
	Allegro PCB SI	SI analysis
	OrCAD Signal Explorer	SI analysis
	Allegro Design Entry HDL	SI analysis
	Allegro Design Entry CIS	PCB board schematics
	Cadence OrCAD Capture and Capture CIS	PCB board schematics
	Allegro PCB Design	PCB board layout
	OrCAD PCB Designer	PCB board layout
Mentor Graphics	ICX/Tau	Signal integrity (SI) analysis
	I/O Designer	FPGA I/O planning
	HyperLynx SI	SI analysis
	DxDesigner	PCB board schematics
	PADS	PCB board schematics and layout
	Expedition Enterprise	PCB board layout
	Board Station	PCB board layout
Synopsys	HSPICE	SI analysis

Table 6. ASIC Prototyping
Company	Product Name	Design Solution
FlexRas Technologies	Wasga Compiler	Multi-chip partitioning system
Synopsys	Certify	Multi-chip partitioning system