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Foundation Series ISE 3.1i User Guide
Chapter 16: Programming the Device

Creating CPLD Programming Files

At the end of a successful CPLD implementation, a design database file (top_source_name.vm6) is created. From this, a JEDEC programming file can be generated. The JTAG Programmer uses this JED file to configure XC9500/XL/XV CPLD devices.

To create a JED programming file for your design, use the following procedure.

  1. Select the top-level source for the project in the Source window.

  2. Click Create Programming File in the Process window.

  3. Click Process Run in the Project Navigator menu. (An alternative method is to double-click on Creating Programming File in the Process window.)

  4. The programming file creation process runs. If there are no errors, the top_source_name.jed file is created.

Launching the JTAG Programmer

When you are ready to configure the target device, you need to use the JTAG Programmer to configure the targeted device. The "Programming Tools" section contains a short overview of the JTAG Programmer.

To launch the JTAG Programmer, select the top-level source file in the Source window and then double-click on JTAG Programmer in the Process window. The TAG Programmer opens in its own window with the JED file loaded.

Setting Programming File Creation Options

This section describes the programming options you can set prior to creating the programming file. Use the following procedure to access the Process Properties dialog box containing these options.

  1. Click on a the top-level design source file in the Source window for a project that targets an FPGA device.

  2. Right click on Create Programming File in the Process window.

  3. Select Properties from the pulldown menu that appears.

  4. The Process Properties dialog box (shown in the following figure) for the Create Programming File process appears.

You can set the following options for CPLD programming file creation:

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