OR12, 16

12- and 16-Input OR Gates with Non-Inverted Inputs

Architectures Supported

OR12, OR16
Spartan-II, Spartan-IIE	Macro
Spartan-3	Macro
Virtex, Virtex-E	Macro
Virtex-II, Virtex-II Pro, Virtex-II Pro X	Macro
XC9500, XC9500XV, XC9500XL	No
CoolRunner XPLA3	No
CoolRunner-II	No

See “OR2-9” for information on OR functions.

OR16 Implementation Spartan-II, Spartan-IIE, Virtex, Virtex-E

OR16 Implementation Spartan-3, Virtex-II, Virtex-II Pro, Virtex-II Pro X

Usage

For HDL, OR12 and OR16 are macros that are inferred. See “OR2-9” for information about inferring OR gates.

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