|
|
| ml410_bsb_design.zip |
An EDK 8.1i SP2 hardware design generated with Base System Builder (BSB) |
EDK IP:
- PPC405
- PLB_BRAM
- PLB_DDR
- PLB2OPB_BRIDGE
- PLB_ETHERNET
- OPB_GPIO
- OPB_IIC
- OPB_UART16550
|
- OPB_INTC
- OPB_SPI
- OPB_SYSACE
- OPB2PLB_BRIDGE
- OPB_PCI
- PCI_ARBITER
- JTAGPPC_CNTLR
|
| ml410_bsb_design_creation.pdf |
Tutorial on how to use the EDK Base System
Builder to create and use the ml410_bsb_design |
|
| ml410_bsb_standalone_apps.zip |
BSB Standalone Apps design, including BIT, ELF and ACE files. Contains the results of running the tutorial flow |
| ml410_bsb_standalone_apps_overlay.zip |
BSB Standalone Apps overlay source files, including BIT, ELF and ACE files |
| ml410_bsb_standalone_apps_bit_elf_ace.zip |
BIT, ELF, and ACE files for the stand-alone applications |
| ml410_bsb_standalone_apps.pdf |
Tutorial on how to compile and download the stand-alone applications
to test board functionality |
|
| ml410_bsb_vxworks.zip |
BSB generated ML410 design (Networking, no PCI) with VxWorks
design files. Contains the results of running the tutorial flow |
| ml410_bsb_vxworks_overlay.zip |
BSB generated ML410 overlay source files (Networking, no PCI) with VxWorks
and updated XMP and MSS files |
ml410_bsb_vxworks_bit_elf_ace.zip
|
Contains EDK 8.1i SP2 / ISE 8.1i SP3 bit and ACE files, along
with a VxWorks 5.5 ELF file |
ml410_bsb_vxworks_bsp.zip
|
Provides a pre-built Tornado 2.2.1 VxWorks BSP generated by EDK
8.1i SP2. (Place in $WIND_BASE\target\config) |
ml410_bsb_vxworks_proj.zip
|
Provides the pre-built Tornado 2.2.1 VxWorks project used to
create the VxWorks 5.5 system image. (Place in $WIND_BASE\target\proj) |
| ml410_bsb_vxworks_bsp_proj_creation.pdf |
Tutorial on how to start with an EDK hardware design and re-create
the pre-built VxWorks BSP and project for the BSB design. Also
covers VxWorks system image creation and using the Tornado 2.2.1
tools |
|
| ml410_bsb_uboot.zip |
BSB generated ML410 base design (Networking, no PCI) with updated XMP and MSS files for U-Boot. Contains the results of running the tutorial flow |
| ml410_bsb_uboot_overlay.zip |
BSB U-Boot overlay source files, including BIT, ELF and ACE files |
| ml410_bsb_uboot_bit_elf_ace.zip |
BIT, ELF, and ACE files for the U-Boot design |
| u-boot.zip |
8.1i U-Boot source tree |
ml410_bsb_uboot_proj_creation.pdf
|
Tutorial on creating
and running the DDR memory resident U-Boot Bootloader on the ML410 BSB design |
|
| ml410_bsb_ddr2_design.zip |
An EDK 8.1i SP2 hardware design generated with Base System Builder
(BSB)
|
EDK IP:
- PPC405
- PLB_BRAM
- PLB_DDR2
- PLB2OPB_BRIDGE
|
- PLB_ETHERNET
- OPB_INTC
- OPB_UART16550
- JTAGPPC_CNTLR
|
CPU: 300 MHz; PLB/OPB: 100 MHz
DDR: 100 MHz, 32-bit
PCI: N/A |
| ml410_bsb_ddr2_design_creation.pdf |
Tutorial on how to use the EDK Base System
Builder to create and use the ml410_bsb_ddr2_design |
|
| ml410_bsb_ddr2_vxworks.zip |
BSB generated ML410 design (Networking, no PCI) with VxWorks
design files. Contains the results of running the tutorial flow |
| ml410_bsb_ddr2_vxworks_overlay.zip |
BSB generated ML410 overlay source files (Networking, no PCI) with VxWorks
and updated XMP and MSS files |
ml410_bsb_ddr2_vxworks_bit_elf_ace.zip
|
Contains EDK 8.1i SP2 / ISE 8.1i SP3 bit and ACE files, along
with a VxWorks 5.5 ELF file |
ml410_bsb_ddr2_vxworks_bsp.zip
|
Provides a pre-built Tornado 2.2.1 VxWorks BSP generated by EDK
8.1i SP2. (Place in $WIND_BASE\target\config) |
ml410_bsb_ddr2_vxworks_proj.zip
|
Provides the pre-built Tornado 2.2.1 VxWorks project used to
create the VxWorks 5.5 system image. (Place in $WIND_BASE\target\proj) |
ml410_bsb_ddr2_vxworks_bsp_proj_creation.pdf
|
Tutorial on how to start with an EDK hardware design and re-create
the pre-built VxWorks BSP and project for the BSB design. Also
covers VxWorks system image creation and using the Tornado 2.2.1
tools |
|
| ml410_rgmii_plb_temac.zip |
RGMII added to ML410 BSB 1 design |
| ml410_rgmii_overlay.zip |
RGMII overlay source files |
ml410_rgmii_bit_elf_ace.zip
|
Contains EDK 8.1i SP2 / ISE 8.1i SP3 bit and ACE files, along
with an ELF file |
| ml410_bsb_rgmii_addition.pdf |
Tutorial on how to add the RGMII PLB Core to the BSB design |
|
| ml410_sgmii_plb_temac.zip |
BSB generated ML410 design with SGMII added |
| ml410_sgmii_overlay.zip |
SGMII overlay source files |
| ml410_sgmii_bit_elf_ace.zip |
Contains EDK 8.1i SP2 / ISE 8.1i SP3 bit and ACE files, along
with an ELF file |
| ml410_bsb_sgmii_addition.pdf |
Tutorial on how to add the SGMII PLB Core to the BSB design |
|
| ml410_dual_design.zip |
An EDK 8.1i SP2 dual processor hardware design. |
EDK IP PPC405_0:
- PPC405
- PLB_BRAM
- PLB_DDR
- PLB2OPB_BRIDGE
- PLB_ETHERNET
- OPB_GPIO
- OPB_IIC
- OPB_UART16550
|
- OPB_INTC
- OPB_SPI
- OPB_SYSACE
- OPB2PLB_BRIDGE
- OPB_PCI
- PCI_ARBITER
- JTAGPPC_CNTLR
|
| EDK IP PPC405_1:
|
- PLB2OPB_BRIDGE
- OPB_UART16550
- OPB_INTC
|
| ml410_dual_design.pdf |
Tutorial on how to use the ml410_dual_design in EDK |
|
| ml410_dual_vxworks.zip |
Dual Processor ML410 design with VxWorks. Contains the results of running the tutorial flow |
| ml410_dual_vxworks_overlay.zip |
Dual Processor ML410 overlay source files with VxWorks
and updated XMP and MSS files |
ml410_dual_vxworks_bit_elf_ace.zip
|
Contains EDK 8.1i SP2 / ISE 8.1i SP3 bit and ACE files, along
with a VxWorks 5.5 ELF file |
ml410_dual_vxworks_bsp_0.zip
ml410_dual_vxworks_bsp_1.zip |
Pre-built Tornado 2.2.1 VxWorks BSPs generated by EDK
8.1i SP2 for each processor in the dual processor design. (Place in $WIND_BASE\target\config) |
ml410_dual_vxworks_proj_0.zip
ml410_dual_vxworks_proj_1.zip |
Pre-built Tornado 2.2.1 VxWorks projects for both processors. Used to
create the VxWorks 5.5 system image. (Place in $WIND_BASE\target\proj) |
ml410_dual_vxworks_bsp_proj_creation.pdf
|
Tutorial on how to start with an EDK hardware design and re-create
the pre-built VxWorks BSP and project for the Dual design. Also
covers VxWorks system image creation and using the Tornado 2.2.1
tools |
|
|
| ml410_bsb_design.zip |
An EDK 7.1i SP2 hardware design started with Base System Builder
(BSB) and then customized to ease software porting across all
the ML410 designs. BSB generated ML410 base design (Networking, no PCI) |
EDK IP:
- PPC405
- PLB_BRAM
- PLB_DDR
- PLB2OPB_BRIDGE
- PLB_ETHERNET
- OPB_GPIO
|
- OPB_IIC
- OPB_INTC
- OPB_SPI
- OPB_SYSACE
- OPB_UART16550
- JTAGPPC_CNTLR
|
CPU: 300 MHz; PLB/OPB: 100 MHz
DDR: 100 MHz, 32-bit
PCI: N/A |
| ml410_bsb_design_creation.pdf |
Tutorial on how to use the EDK Base System
Builder to create and use the ml410_bsb_design |
| ml410_revb_bsb_xbd.zip |
ML410 XBD File - Used for both Rev B and Rev C boards. Extract to %XILINX_EDK%
before creating ML410 Rev B BSB design. For use with EDK 7.1i tools |
|
| ml410_bsb_standalone_apps.zip |
BSB Standalone Apps design, including BIT, ELF and ACE files. Contains the results of running the tutorial flow |
| ml410_bsb_standalone_apps_overlay.zip |
BSB Standalone Apps overlay source files, including BIT, ELF and ACE files |
| ml410_bsb_standalone_apps_bit_elf_ace.zip |
BIT, ELF, and ACE files for the stand-alone applications |
| ml410_bsb_standalone_apps.pdf |
Tutorial on how to compile and download the stand-alone applications
to test board functionality |
|
| ml410_bsb_vxworks.zip |
BSB generated ML410 base design (Networking, no PCI) with VxWorks
design files. Contains the results of running the tutorial flow |
| ml410_bsb_vxworks_overlay.zip |
BSB generated ML410 base design overlay source files (Networking, no PCI) with VxWorks
and updated XMP and MSS files |
ml410_bsb_vxworks_bit_elf_ace.zip
|
Contains EDK 7.1i SP2 / ISE 7.1i SP4 bit and ACE files, along
with a VxWorks 5.5 ELF file |
ml410_bsb_vxworks_bsp.zip
|
Provides a pre-built Tornado 2.2.1 VxWorks BSP generated by EDK
7.1i SP2. (Place in $WIND_BASE\target\config) |
ml410_bsb_vxworks_proj.zip
|
Provides the pre-built Tornado 2.2.1 VxWorks project used to
create the VxWorks 5.5 system image. (Place in $WIND_BASE\target\proj) |
| ml410_bsb_vxworks_bsp_proj_creation.pdf |
Tutorial on how to start with an EDK hardware design and re-create
the pre-built VxWorks BSP and project for the BSB design. Also
covers VxWorks system image creation and using the Tornado 2.2.1
tools |
|
| ml410_bsb_uboot.zip |
BSB generated ML410 base design (Networking, no PCI) with updated MHS and MSS files for U-Boot. Contains the results of running the tutorial flow |
| ml410_bsb_uboot_overlay.zip |
BSB U-Boot overlay source files, including BIT, ELF and ACE files |
| ml410_bsb_uboot_bit_elf_ace.zip |
BIT, ELF, and ACE files for the U-Boot design |
| u-boot.zip |
7.1i U-Boot source tree |
| ml410_bsb_uboot_proj_creation.pdf |
Tutorial on creating
and running the DDR memory resident U-Boot Bootloader on the ML410 BSB design |
|
ml410_pci_design.zip
ml410_pci_design_overlay.zip |
An EDK 7.1i SP2 PCI hardware design used by the Linux, VxWorks,
and stand-alone tutorials. PCI Design based on the generated ML410 BSB design |
EDK IP:
- PPC405
- PLB_BRAM
- PLB_DDR
- PLB2OPB_BRIDGE
- PLB_ETHERNET
- OPB_GPIO
- OPB_IIC
- OPB_UART16550
|
- OPB_INTC
- OPB_SPI
- OPB_SYSACE
- OPB2PLB_BRIDGE
- OPB_PCI
- PCI_ARBITER
- JTAGPPC_CNTLR
|
CPU: 300 MHz; PLB/OPB: 100 MHz;
DDR: 100 MHz; 32-bit
PCI: 33 MHz, 32-bit |
| ml410_pci_design.pdf |
Tutorial on how to use the ml410_pci_design in EDK |
|
| ml410_pci_standalone_apps.zip |
PCI Stand-Alone Apps design, including BIT, ELF and ACE files. Contains the results of running the tutorial flow |
| ml410_pci_standalone_apps_overlay.zip |
PCI Stand-Alone Apps overlay source files, including BIT, ELF and ACE files |
ml410_pci_standalone_apps_bit_elf_ace.zip
|
Contains EDK 7.1i SP2 / ISE 7.1i SP4
bit and ACE files, as well as ELF files for the included stand-alone
applications |
| ml410_pci_standalone_apps.pdf |
Tutorial on how to compile
and download the stand-alone applications to test board functionality
including the PCI bus |
|
| ml410_pci_linux.zip |
ML410 PCI design with Linux and updated MHS and
UCF files. Contains the results of running the tutorial flow |
| ml410_pci_linux_overlay.zip |
ML410 PCI Linux Overlay. Use with the ML410 BSB Design |
ml410_pci_linux_bit_elf_ace.zip
|
Contains EDK 7.1i SP2 / ISE 7.1i SP4 bit and ACE files, along
with a Linux ELF file created with MVL 3.1 Pro |
| ml410_pci_linux_bsp.zip |
Contains EDK 7.1i SP2-generated
Linux BSP |
| ml410_pci_linux_bsp_proj_creation.pdf |
Tutorial on how to configure and re-create the Linux kernel
for the PCI design using XPS and MVL 3.1 Pro |
| ml410_pci_linux_kernel_config.zip |
Generated configuration file
that contains linux kernel modifications |
|
|
UltraController-II for ML410 |