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Xilinx Virtex-7 FPGA VC7203 Characterization Kit

 

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$6,995

Part Number:

CK-V7-VC7203-G
CK-V7-VC7203-G-J

The Virtex™-7 FPGA VC7203 Characterization Kit provides the hardware environment for characterizing and evaluating 28 GTX (12.5Gbps) transceivers of the on-board Virtex-7 V485T FPGA. The VC7203 allows evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using either the Vivado™ or ISE® design suites. Each GTX Quad and its associated reference clock are routed from the FPGA to a connector pad which is designed to interface with a Samtec BullsEye connector.  A cable enabled with a BullsEye connector and 10 standard SMAs allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment.  Each BullsEye connector handles a full GTX Quad, four transmit/receive pairs as well as the two independent reference clocks, enabling the highest level of flexibility in testing custom applications.

What's Included

  • VC7203 Evaluation Board featuring the Virtex-7 XC7VX485T-3FFG1761E FPGA
  • Full seat Vivado Design: Design Edition
    • Device-locked to the Virtex-7 XC7VX485T FPGA
  • One Samtec Bullseye Cable
  • Superclock-2 Module Supporting Multiple Frequencies
  • Documentation
  • Board Design Files
  • Cables & Power Supply 
    • On-board power supplies for all necessary voltages
    • Terminal blocks for optional use of external power supplies
    • Power module supporting Virtex-7 FPGA GTX transceiver power requirements

VC7203 Characterization Kit

 Key Features

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FPGA: Virtex-7 XC7VX485T-3FFG1761E FPGA
  • ROHS compliant VC7203 kit including the XC7VX485T-3FFG1761E FPGA
Configuration
  • Digilent USB JTAG programming port
Memory
  • System ACE™ SD controller
Communication & Networking
  • Nine Samtec BullsEye connector pads for the GTX transceivers and reference clocks
  • Two pairs of differential MRCC inputs with SMA connectors
  • USB-to-UART bridge
Display
  • Power status LEDs
  • General purpose DIP switches, LEDs, push buttons, and test I/O
Expansion Connectors
  • Three VITA 57.1 FPGA mezzanine card (FMC) high pin count (HPC) connectors
Clocking
  • Fixed, 200 MHz 2.5V LVDS oscillator wired to multi-region clock capable (MRCC) inputs
  • SuperClock-2 module supporting multiple frequencies
Control & I/O
  • I2C Bus
Power
  • PMBus connectivity to on-board digital power supplies

Vivado Design Suite: Design Edition (Device-locked to the Virtex-7 XC7VX485T FPGA).

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Vivado Design Suite The Xilinx Vivado™ Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for all programmable devices.  
NameDescription
Virtex-7 FPGA VC7203 Characterization KitDocumentation and Design Files available for the VC7203 Characterization Kit.
 
 
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