DDC Ethernet AVB Development Kit

Device Family Support

• Spartan-6

The DDC EAVB Development Kit includes two DDC EAVB modules. The first EAVB module connects to standard BT.656 video OR connects to a DVD player (audio and video – requires cable, not included). The second module receives the video and/or audio stream and drives this out to a DVI enabled monitor (DVI monitor not included).

The Development Kit allows users to interact with certain EAVB settings via a DDC module that works within the Xilinx EDK. The EDK is not included.

The kit will include the following FPGA Cores:

• TEMAC
• EAVB Endpoint
• AVB Media Packetizer
• AVB Media Extractor (media clock recovery)
• Ethernet Frame Capture 
• Ethernet Frame Generator

What's Included

Boards

• 2 EAVB PCBs with a Xilinx Spartan 6 XC6SLX75 FPGA, Marvell 88E1111 Ethernet PHY, 512 MB of Micron DDR2 SDRAM, 256Mb of FLASH memory
• 2 EAVB Audio/Video Mezzanine PCBs with an Audio CODEC, NTSC Decoder, and DVI output

Documentation

• An example FPGA design that illustrates an example EAVB transceiver system with NTSC video and stereo 48 kHz audio. This includes external device peripheral logic, and the DDC EAVB IP Suite – comprised of the Ethernet AVB Endpoint, AVB Media Packetizer, AVB Media Extractor and Legacy Traffic Transceiver.

Cables & Adapters

• 2 12V Power Supplies