Virtex-6 FPGA x8 PCI Express Gen 2 Kit

Documentation

• Kit Supporting Documents from HiTech Global

Device Family Support

• Virtex-6 LXT
• Virtex-6 SXT

The Virtex®-6 FPGA x8 PCI Express Gen 2 kit is a comprehensive design environment for rapid prototyping and development of PCI Express® Gen 1 & 2. This kit is supported by a series of FMC Vita57 modules which expand the functionality for wide range of high-speed serial connectivity applications.

What's Included

Hardware and Design Tools

• HTG Virtex-6 PCI Express Board LX240T-2 FPGA
• ISE® Design Suite : Logic Edition (Device-locked to the Virtex6 LX240T-2 FPGA)
• 30-day evaluation version of PCI Express drivers for Linux & Windows
• Power Bus Management Tool

Documentation and Getting Started Demo

• Board’s User Manual
• Getting Started Guide
• Hardware Setup Guide
• x8 PCI Express Gen2 /DMA Demo
• x8 PCI Express PIO Reference Design
• DDR3 Memory Controller Reference Design
• IBERT for Serial Transceivers

Key Features

• Xilinx Virtex-6LX240T-2 ( LX550T, LX365T, SX475T, or SX315T models in different speed grades are also available)
• x8 PCI Express Gen 2 Edge Connector
• PCI Express Jitter  Attenuator for cleaning host PC clock and generating different PCIe clocks (100MHz, 250MHz, etc.)
• DDR3 SO-DIMM (up to 4GB)
• One USB 2.0 & 3.0 Host port
• One USB 2.0 & 3.0 Device port
• Two SFP ports (4 additional SFP and two SFP+ connectors are available through HTG-FMC-4SFP-4SATA and  HTG-FMC-SFP-PLUS modules)

• Four SMA connectors for one GTX serial transceiver port (8 additional SMA ports are available through HTG-FMC-8SMA module)

• Two SMA connectors for  external differential clock
• Two 10/100/1000 Ethernet ports with SGMII, RGMII, and GMII support using Marvell 88E111 PHY (4 additional SGMII ports are available through HTG-FMC-RJ45 module)
• FMC Vita 57 compliant  Expansion Connectors:
  • Connecter #1:
    • 160 Single Ended IOs (or 80 LVDS), & ten  Data-Rate-Adjustable GTX transceivers with the LX550T, LX365T, LX240T, SX475T, or SX315T models
  • Connecter #2:
    • 126 Single Ended IOs (or 63 LVDS) with the LX550T, LX365T, LX240T, SX475T, or SX315T models
    • 160 Single Ended IOs (or 80 LVDS), & ten Data-Rate-Adjustable GTX transceivers with the LX550 and SX475 models
• Auxiliary FMC Super Clock for board-to-board communication
• Samtec QSE High-speed connectors with 32 pairs of LVDS IOs
• IP Protection Chipset
• Power Management Bus for all voltage rails
• Size: 9.5" x 4.25"
• Support for both PCI Express and stand alone operation modes