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Virtex-7 Box

Xilinx Virtex-7 FPGA VC7222 Characterization Kit

  • Price: $12,995
  • Part Number: CK-V7-VC7222-G
  • Lead Time: 2 Weeks
  • Device Support:

Product Description

The kit provides the hardware environment for characterizing and evaluating the GTH and GTZ transceivers available on the Virtex-7 XC7VH580T-G2HCG1155E FPGA while allowing evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using the Vivado® Design Suite. Each GTH and GTZ Quad and its associated reference clock are routed from the FPGA to SMA and Samtec BullsEye connector. A cable containing a BullsEye connector and standard SMA connectors allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment. Each BullsEye connector handles a full GTH or GTZ Quad, four transmit/receive pairs, enabling the highest level of flexibility in testing custom applications. Find out more and see what is included in the kit.​


Key Features & Benefits

  • Hardware environment for characterizing and evaluating the GTH and GTZ transceivers on Virtex-7 VH580T FPGAs
  • Hardware, design tools, IP, and pre-verified reference designs
  • Integrated Bit Error Ratio Test (IBERT) reference design
  • System ACE™ SD controller
  • Expand I/O with 2 FPGA Mezzanine Card (FMC) interface 
  • BullsEye connector supporting a full GTH or GTZ Quad, with four transmit/receive pairs
  • Six Samtec BullsEye connector pads for the GTH transceivers and reference clocks
  • Two Samtec BullsEye connector pads for the GTZ transceivers and reference clocks
  • Two pairs of differential MRCC inputs with SMA connectors

Board Features

Featuring the VC7222 Characterization Board

ck-v7-vc7222-g-hardware-kit

Communication & Networking

  • Six Samtec BullsEye connector pads for the GTH transceivers and reference clocks
  • Two Samtec BullsEye connector pads for the GTZ transceivers and reference clocks
  • Two pairs of differential MRCC inputs with SMA connectors
  • USB-to-UART bridge

Clocking

  • Fixed, 200 MHz 2.5V LVDS oscillator wired to multi-region clock capable (MRCC) inputs
  • SuperClock-2 module supporting multiple frequencies

Display

  • Power status LEDs
  • General purpose DIP switches, LEDs, push buttons, and test I/O

Expansion Connectors

  • Two VITA 57.1 FPGA mezzanine card (FMC) high pin count (HPC) connectors

Configuration

  • Digilent USB JTAG programming port

Memory

  • System ACE™ SD controller

Control & I/O

  • I2C Bus

Power

  • PMBus connectivity to on-board digital power supplies

Featured Xilinx Devices

Featuring the ROHS compliant kit including the XC7VH580T-G2HCG1155E FPGA 

Logic Cells  580,480
DSP Slices 1,680
Memory (Kb) 33,840
GTY 13.1 Gb/s Transceivers 48
I/0 Pins 600
virtex-7-bk-chip

What's Inside

VC7222 Evaluation Board

Featuring the Virtex-7 XC7VH580T-G2HCG1155E FPGA

Full seat Vivado® Design Suite: Design Edition

Node locked & Device-locked to the Virtex-7 XC7VH580T FPGA, with 1 year of updates

Samtec Bullseye Cable with 10 standard SMAs

BullsEye Cable for Xilinx FPGA Characterization kits

Superclock-2 Module Supporting Multiple Frequencies

Micro USB Cable

Power Adapter

Design Tools

Name Description License Type
Vivado Design Suite Design Edition The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for all programmable devices. Node locked & Device-locked to the Virtex-7 XC7VH580T-G2HCG1155E FPGA, with 1 year of updates and support
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