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Xilinx Virtex UltraScale+ FPGA VCU118 Evaluation Kit

Product Description

The Virtex® UltraScale+™ FPGA VCU118 Evaluation Kit is the ideal development environment for evaluating the cutting edge Virtex UltraScale+ FPGAs. Virtex UltraScale+ devices provide the highest performance and integration capabilities in a FinFET node, including both the highest serial I/O and signal processing bandwidth, as well as the highest on-chip memory density.

This kit is ideal for prototyping applications ranging from 1+ Tb/s networking and data center to fully integrated radar/early-warning systems.

Device Support: Virtex UltraScale+ FPGA

Key Features & Benefits

  • Optimized for quickly prototyping applications using Virtex UltraScale+ FPGAs with access to the following features:
    • Dual 80-bit DDR4 Component Memory
    • RLDRAM3 (2x36-bit) Memory
    • Dual QSFP28 Interfaces
    • PCIe Gen3 x16 (VCCINT = 0.85V)
    • VITA 57.4 FMC+ Interface
    • VITA 57.1 FMC Interface
    • Samtec FireFly Interface

Featured Accessories

What's Included

Featured Documents

xilinx-131x43
Contact Sales
  • Price: $6,995
  • Part Number: EK-U1-VCU118-G
  • Lead Time: 5 Weeks
vcu118-board-image
  • XCVU9P-L2FLGA2104E FPGA
    • System Logic Cells: 2,586 K
    • Block RAM:  75.9 Mb
    • UltraRAM: 270.0 Mb
    • Single-Ended HP IO: 832
    • GTY 28.21Gb/s Transceivers: 52

     

     

Featured Partner Components

Configuration
  • Onboard JTAG configuration circuitry to enable configuration over USB
  • JTAG header provided for use with Xilinx download cables such as the Platform Cable USB II
  • 1 Gb Linear x16 BPI flash memory
Communication & Networking
  • 10/100/1000 Mbps Ethernet (SGMII)
  • Dual 4x28Gbps QSFP28 cages
  • Samtec FireFly 4x28Gbps Interface
  • Dual USB-to-UART Bridge with mico-B USB connector
  • RJ45 Ethernet connector
  • PCI Express endpoint Gen3 x 16
Expansion Connectors
  • FMC+ HSPC connector (24 – 28Gbps GTY Transceivers,  80 differential user defined pairs)
  •  FMC HPC1 connector (58 differential user defined pairs)
  •  PMOD header
  •  IIC
Control & I/O
  • User Push Buttons (x5)
  • User DIP Switch (4-position)
  • PMBUS & System Controller MSP430 for power, clocks, SD-Card and I2C bus switching
Memory
  • Two 4 GB DDR4 component memory interfaces (five [256 Mb x 16] devices each)
  • 4 MB RLD3 component memory interfaces (five [256 Mb x 16] devices each)IIC EEPROM: 8Kb
  • Micro Secure Digital (SD) connector 1Gb Quad SPI Flash
Display
  • HDMI Video output
  • Users & Status LEDs
Clocking
  • SI5335A Quad Clock Generator
  • Si570 IIC Programmable LVDS Clock Generator
  • SI5328C Clock Multiplier and Jitter Attenuator
  • 2x SMA MGT Reference Clock inputs
  • 1 SMA User Clock input
Power
  • 12V wall adapter or ATX

In the Box

file

VCU118 Peripherals

  • Power Supply
  • USB Cables
  • Ethernet Cable
  • QSFP electrical loopback module
  • FMC+, FMC and PCIe loopback boards
  • Samtec FireFly Loopback cable
Step 1: Board Revision
Step 3:

Included in this Kit

Design and Development Tools

Name Description License Type
Vivado Design Suite: Design Edition The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for all programmable devices. Node locked & Device-locked to the XCVU9P FPGA, with 1 year of updates

Intellectual Property

Name Description License Type
Memory Interface Generator (MIG) MIG is a free software tool used to generate memory controllers and interfaces for Xilinx FPGAs No-Charge IP