Xilinx ML401 Evaluation Platform Demos and Reference Design

Your ML401 Evaluation Platform is shipped with a number of demonstration designs pre-installed on the Compact Flash card, Platform Flash, and Linear Flash memories. The ML401 Getting Started Tutorial describes how to quickly get started using your ML401. This tutorial also contains a number of hands-on user lab exercises to help you learn to use your ML401. Please download the lab resource files here.

This ML401 example reference system uses the Embedded Development Kit. An IBM CoreConnect™ infrastructure connects the MicroBlaze CPU to numerous peripherals using Processor Local Bus (PLB), On-Chip Peripheral Bus (OPB), and Device Control Register (DCR) buses to build a complete system. The reference system contains hardware and software designs. Please refer to the reference design user guide documentation before proceeding with the design:

EDK 8.1 SP1 / ISE 8.1 SP2
ML401 EDK Processor Reference Design User Guide
ML401 EDK Embedded MicroBlaze Reference Design

The ML401 board contains a CPLD that can read the contents of Flash memory and program the FPGA. This demonstrates an alternative method of programming Xilinx FPGAs. The CPLD also supports the ability to load one of eight possible bitstream revisions depending on the Configuration Address DIP Switch settings. Click here for the ML401 CPLD Reference Design which includes source files and information on how to rebuild the design.

The ML401 Evaluation Platform includes a DSP video demonstration design on the Compact Flash card. Click here for documentation and source files for the DSP48 demonstration design.

The ML401 Evaluation Platform includes a USB keyboard demonstration design on the Compact Flash card. Click here for documentation and source files for the USB demonstration design.

Restoring ML401 Demonstration Images