ML507 PPC440 Stand-Alone Applications

ML507 Designs Featured Tested / Description
ml507_mb_standalone_apps_bit_elf_ace.zip Complete collection of Standalone Applications and Board Test bit, elf, and ACE files.

To run each application individually, select one of the ACE files below and replace the "system_my_ace.ace" in configuration address 6 of the production ML507 CF card.
BSB Design
ML507 EDK BSB Design Design source files and tutorials are available here.
ml507_bsb_bootloop.bit
ml507_bsb_testapp_mem.elf
ml507_bsb_testapp_mem.ace
testapp_memory_readme.txt
SRAM & DDR2
ml507_bsb_bootloop.bit
ml507_bsb_testapp_periph.elf
ml507_bsb_testapp_periph.ace
testapp_peripheral_readme.txt
RS232_Uart_2
LEDs_8Bit
LEDs_Positions
Push_Buttons_5Bit
DIP_Switches_8Bit
IIC_EEPROM
Ethernet_MAC
SysACE_CompactFlash
debug_module
BSB + STD IP Design
ML507 BSB Design IP Addition Design source files and tutorials are available here.
ml507_std_ip_bootloop.bit
bootload_lcd.elf
bootload_lcd.ace
bootload_lcd_readme.txt
Main menu to load and launch ACE file demonstrations.
ml507_std_ip_bootloop.bit
button_led_test.elf
button_led_test.ace
button_led_test_readme.txt
Verifies functionality of GPIO DIP switches, GPIO LEDs, N,E,S,W buttons and LEDs.
ml507_std_ip_bootloop.bit
hello.elf
hello.ace
hello_readme.txt
Exercises serial port output and input functionality using libc routines.
ml507_std_ip_bootloop.bit
hello_uart.elf
hello_uart.ace
hello_uart_readme.txt
Exercises serial port output and input functionality using low level UART driver routines on UART #1.
ml507_std_ip_bootloop.bit
hello_uart_1.elf
hello_uart_1.ace
hello_uart_1_readme.txt
Exercises serial port output and input functionality using low level UART driver routines on UART #2.
ml507_std_ip_bootloop.bit
iic_clock.elf
iic_clock.ace
iic_clock_readme.txt
The Xilinx IIC peripheral is used in dynamic mode along with its low-level driver to access the Clock generator chip.
ml507_std_ip_bootloop.bit
iic_ddr2.elf
iic_ddr2.ace
iic_ddr2_readme.txt
The Xilinx IIC peripheral is used in dynamic mode along with its low-level driver to access the DDR2 SPD EEPROM.
ml507_std_ip_bootloop.bit
iic_dvi_connector.elf
iic_dvi_connector.ace
iic_dvi_connector_readme.txt
The Xilinx IIC peripheral is used in dynamic mode along with its low-level driver to access the DVI Connector's IIC pins.
ml507_std_ip_bootloop.bit
iic_dvi_controller.elf
iic_dvi_controller.ace
iic_dvi_controller_readme.txt
The Xilinx IIC peripheral is used in dynamic mode along with its low-level driver to access the DVI Controller.
ml507_std_ip_bootloop.bit
iic_eeprom.elf
iic_eeprom.ace
iic_eeprom_readme.txt
IIC Dynamic mode EEPROM access example.
ml507_std_ip_bootloop.bit
iic_fan.elf
iic_fan.ace
iic_fan_readme.txt
The Xilinx IIC peripheral is used in dynamic mode along with its low-level driver to access the Fan Controller.
ml507_std_ip_bootloop.bit
iic_sfp.elf
iic_sfp.ace
iic_sfp_readme.txt
The Xilinx IIC peripheral is used in dynamic mode along with its low-level driver to access a user supplied SFP Module.
ml507_std_ip_bootloop.bit
iic_vga_in_controller.elf
iic_vga_in_controller.ace
iic_vga_in_controller_readme.txt
The Xilinx IIC peripheral is used in dynamic mode along with its low-level driver to access the VGA input controller.
ml507_std_ip_bootloop.bit
piezo.elf
piezo.ace
ringtones.zip
piezo_readme.txt
Demonstrates audio output to the onboard piezo speaker using the Ringtone RTTTL files.
ml507_std_ip_bootloop.bit
testfatfs.elf
testfatfs.ace
testfatfs.zip
testfatfs_readme.txt
Write and read test of the FAT file system on the CompactFlash card.
ml507_std_ip_bootloop.bit
sysace_rebooter.elf
sysace_rebooter.ace
sysace_rebooter_readme.txt
User selectable loading of ACE files utilizing the System ACE™ CF controller.
ml507_std_ip_bootloop.bit
xflash.elf
xflash.ace
xflash_readme.txt
Tests Linear Flash Memory.
BSB + STD IP + USB Design
ML507 STD IP Design USB Addition Design source files and tutorials are available here.
ml507_std_ip_usb_bootloop.bit
usb_hpi_test.elf
usb_hpi_test.ace
demo.bin
usb_hpi_test_readme.txt
USB host interface test utilizing a USB keyboard.
BSB + STD IP + Pcores Design
ML507 STD IP Design Pcore Addition Design source files and tutorials are available here.
ml507_pcores_bootloop.bit
bootload_video.elf
bootload_video.ace
bootload_video_readme.txt
Video Bootload application.
ml507_pcores_bootloop.bit
flash_hello.elf
flash_hello_readme.txt
Place holder application for a user generated Linear Flash design. Loaded from Linear Flash.
ml507_pcores_bootloop.bit
my_ace.elf
my_ace.ace
my_ace_readme.txt
Place holder application for a user generated ACE file. Loaded from CompactFlash.
ml507_pcores_bootloop.bit
my_plat_flash.elf
my_plat_flash_readme.txt
Place holder application for a user generated Platform Flash design. Loaded from Platform Flash.
ml507_pcores_bootloop.bit
simon.elf
simon.ace
simon_readme.txt
Interactive game using N,E,S,W buttons and LEDs as well as the LCD panel.
ml507_pcores_bootloop.bit
slideshow.elf
slideshow.ace
slides.zip
slideshow_readme.txt
A self-running audio and video presentation highlighting features of the ML507 and Virtex®-5 FPGA technology.
ml507_pcores_bootloop.bit
spi_hello.elf
spi_hello_readme.txt
Place holder application for a user generated SPI Flash design. Loaded from SPI Flash.
ml507_pcores_bootloop.bit
xrom.elf
xrom.ace
xrom_readme.txt
Board tests/diagnostics.
ml507_pcores_bootloop.bit
lwipdemo.elf
lwipdemo.ace
lwipdemo_readme.txt
Web browser based control of GPIO LEDs and display of GPIO DIP switch status over Ethernet. Uses LWIP in sockets mode for a webserver.
BSB + STD IP + Pcores + SGMII Design
ML507 STD IP Pcores Design SGMII Addition Design source files and tutorials are available here.
ml507_pcores_sgmii_bootloop.bit
lwipdemo_sgmii.elf
lwipdemo_sgmii.ace
lwipdemo_sgmii_readme.txt
Uses LWIP in sockets mode for a webserver.
 
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