*******************************************************************************
** Copyright © 2008, Xilinx, Inc. 
** This design is confidential and proprietary of Xilinx, Inc. All Rights Reserved.
*******************************************************************************
**   ____  ____ 
**  /   /\/   / 
** /___/  \  /   Vendor: Xilinx 
** \   \   \/    Version: 1.0
**  \   \        Filename: my_plat_flash_readme.txt 
**  /   /         
** /___/   /\     
** \   \  /  \ 
**  \___\/\___\ 
** 
**Device: 
**Purpose:
**Reference: 
**   
*******************************************************************************
**
**  Disclaimer: LIMITED WARRANTY AND DISCLAIMER. These designs are
**              provided to you "as is." Xilinx and its licensors make and you
**              receive no warranties or conditions, express, implied,
**              statutory or otherwise, and Xilinx specifically disclaims any
**              implied warranties of merchantability, noninfringement, or
**              fitness for a particular purpose. Xilinx does not warrant that
**              the functions contained in these designs will meet your
**              requirements, or that the operation of these designs will be
**              uninterrupted or error free, or that defects in the Designs
**              will be corrected. Furthermore, Xilinx does not warrant or
**              make any representations regarding use or the results of the
**              use of the designs in terms of correctness, accuracy,
**              reliability, or otherwise.
**
**              LIMITATION OF LIABILITY. In no event will Xilinx or its
**              licensors be liable for any loss of data, lost profits, cost
**              or procurement of substitute goods or services, or for any
**              special, incidental, consequential, or indirect damages
**              arising from the use or operation of the designs or
**              accompanying documentation, however caused and on any theory
**              of liability. This limitation will apply even if Xilinx
**              has been advised of the possibility of such damage. This
**              limitation shall apply notwithstanding the failure of the
**              essential purpose of any limited remedies herein.
**
*******************************************************************************

Application: my_plat_flash 
--------------------------
We will configure the FPGA, download code, and view the resulting output.  The
my_plat_flash application is meant to reside in the Platform flash memory device
and be used with the Slave SelectMAP configuration mode of the Virtex-5.
However, before programming the Platform flash with this application, we will
test it by initializing the instruction and data memories with a download cable.
Once satisfied with the behavior of the program, we will program the Platform
flash with the application and re-check its behavior.

   CONFIG Switch Settings:  00010101 

1. Connect the Host PC to the ML507 (J1 header) using a PC-IV or
   Platform USB JTAG cable

2. Connect the Host PC serial port to the ML507 serial port using a null
   modem cable and launch a terminal program on the Host (eg. TeraTerm)
   with the settings: 9600 baud, 8-N-1, No flow control

3. Connect the ML507 to a DVI monitor or to a VGA monitor with the
   appropriate adapter 

4. Launch and open the ML507 EDK project (ml507_bsb_system.xmp)

5. Launch a Shell window using XPS menu selection: Project > Launch EDK Shell

6. Download bitstream in shell window by typing: impact -batch etc/download.cmd

7. XPS menu selection: Debug > Launch XMD

8. At XMD% prompt type: cd microblaze_0/code

9. At XMD% prompt type: rst

10. At XMD% prompt type: dow my_plat_flash.elf

11. At XMD% prompt type: con

12. We have just configured and downloaded the my_plat_flash application using
   the JTAG cable. The resulting output is shown below.


Serial Port Output:
-------------------
*** Put Your Own Platform Flash Design Here! ***

LCD Output:
-----------
Put Your Own
Design Here!

DVI/VGA Output:
---------------
*** Put Your Own Platform Flash Design Here! ***


******************************************************************************
Use the Xilinx iMPACT tool to program the Platform Flash 
******************************************************************************

1. After using iMPACT to program the Platform Flash,
   Set the CONFIG DIP switch 

   CONFIG Switch Settings:  00011001 

2. Press the PROG pushbutton to configure the Virtex-5 from the Platform Flash

3. The resulting output of configuring the Virtex-5 using the Platform Flash
   should match the initialization via download cable results shown above.