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Aa|8!(N !| |#x|~x;xH5p` A8~xHi |8!N |cTc>N |cTc>N |cN ||`,Tc>N ||`,N |N |N |N T`D.Tc>|cxdN T`>Tc>T D.T>TkD.|KxTc>T|c[x|xN |,|N |,|N !|8 |xH}= i(/A | N!xK p`|jx@,#<`H#=i9k}k8}hHyA/A/@|jPN !|= }&i4 !|yxHA|#xa/$(,AX|7AHW:-}|J.9);JA`AAP/;;;@܁4!A} a| } $(,8!0N <}9)AT8/AA49 })0}*9A }*9A(~}iN!K`}iN!KTK#x}iN!K8!|= 9) ; /A| N!/@ 8!|N !|KK|8!N !|K|8!N ,8@Xpx ((((( AAAAAABBBBBB PCI Test: Scan PCI Config Regs of ML510 Xilinx PCI Core (AD16): Offset=%02x:%08xEnable Master Transactions on Xilinx PCI Core: Status/Command Reg of Xilinx PCI Core = %08x Set Max LAT Timer on Xilinx PCI Core: Status Reg (0xC) in Xilinx PCI Core = %08x Set Bus Num and Subordinate bus Num on Xilinx PCI Core: Bus Num/Sub Bus Num Reg (0x114) in Xilinx PCI Core = %08x Scan PCI Config Regs of South Bridge (AD18): Scan PCI Config Regs of TI Bridge (AD25): Scan PCI Config Regs of ML510 3.3v PCI Slot 3 (AD22): Scan PCI Config Regs of ML510 3.3v PCI Slot 5 (AD21): Setup TI Bridge Control/status (AD25): TI Bridge Reg offset 0x04 = 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aaXIo_In8XIo_In16XIo_In32VXIo_InSwap16XIo_InSwap32XIo_Out8XIo_Out163XIo_Out32hXIo_EndianSwap16OLDXIo_EndianSwap32OLDXIo_OutSwap16/XIo_OutSwap32mboot.S/cygdrive/c/ml510_bsb1_pcores_ppc440/ppc440_0/libsrc/standalone_v2_00_a/srcGNU AS 2.16l,t}m int&]']%(Aiy^jcpu_init.S/cygdrive/c/ml510_bsb1_pcores_ppc440/ppc440_0/libsrc/standalone_v2_00_a/srcGNU AS 2.16r D, X#0h\^Q\Sr!\ D \"%"% D, int rrtme}reh+ A {  gprH# fprH# w# O# O#i _ len%# k%# %# Je# p%# %#=$_ z% D Qygn{%cp|jZjs- ,par,i.%%_Q nP1'POparPmcpRjS%TD UnumVQ,e Ae A;lp:jpar:, 7&a%%3par_cheQEjX $ 4__x%R  j'luH, X#0h^*-Q,%APQ@SBlowC  %H  %IX  $ %J %r|]PXQ*\SmHnXdQ!mSkdtQval dh %tQval tx %Qval  %)8Qval  %<dQ8Qval  %O2Qval  %bLQ$QSval %uc-Qval. %/Q@QvalA %BSQi$QhSvalj %kP$8QSval $(%8@Q@HQpH,t}m int Hpc ,hp,# h0t}vlWm u32}Lu8%intj~pis07`Nsmss ~ n~ ~ s N`Ms~M~]S,< h0t}MjIvlbm u32}Wu16~>u8%intC~xQw='oQP'VD~Qc '~vQ' ~Q  '~ 3Q22S_2T 3UXQ2WS_WT he|(Q2{S_{~T ((<Q T x<lQ ~T=~ /lxQ2S_TBxQ2S_~T%% $ > $ > .? : ; I@4: ; I%% : ; I$ > .? : ; ' @ : ; I .? : ; ' I@: ; I4: ; I% $ > $ >   I&I: ; II !I/  : ; : ; I8 : ; I8 .: ; ' I@ : ; I4: ; I4: ; I .: ; ' @: ; I4: ; I4: ; I .: ; ' : ; I.? : ; ' @ : ;  1X Y 114: ; I? < % : ; I$ > .? : ; ' @ : ; I: ; I 4: ; I4: ; I  4: ; I 4: ; I   I.? : ; ' @ .? : ;' @ .? : ;' @ : ;I 4: ;I4: ;I% $ > $ > .? : ; ' @: ; I% : ; I$ > : ; I$ > .? : ; ' I@: ; I.? : ; ' @ 4: ; I 4: ; I .? : ; ' @% : ; I$ > : ; I$ > .? : ; ' I@ : ; I4: ; I 4: ; I .? : ;' I@ : ;I 4: ;I .? : ;' @ : ;I  I4: ;I.? : ;' @ h boot.S  %` /cygdrive/c/ml510_bsb1_pcores_ppc440/sw/standalone/hello_pci/srchello_pci.c%/CGqq v!I;ctype.h Dz+#V*;f;c/!KQ!Y"N,:,,:!!H,8-:gq)=+ Gu u9U c)!=1)7"I): ., v t+I9JUacJ +!c9z9'+c.G2+~,JH*G:cF6c GmCG4O<,v9* xtime_l.cxtime_l.h-,:,,,,+,,+:,,+::+6 outbyte.cH :E ../../../includexuartns550_l.cxbasic_types.hpc"M,c t +tg+g"9wA::?:#L:E ../../../includexio.cxbasic_types.hxio.h ++ ++ +1+2 +33H!00 |l $D \lHHHH |l  8 8D(H lHTl |l  | DH| lDLlH|  DXXl` | Dpt@l |l   8 P X d t            $ 8 @ |l LH(DPl |l tpLDLlH$tD(L lHHTlt`\DLlHH |l          ( <0 l x /cygdrive/c/ml510_bsb1_pcores_ppc440temp32GNU C 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)unsigned chardoubleshort unsigned intmainfloatshort int/cygdrive/c/ml510_bsb1_pcores_ppc440/sw/standalone/hello_pci/src/hello_pci.cloopuseconds/cygdrive/c/ml510_bsb1_pcores_ppc440/ppc440_0/libsrc/standalone_v2_00_a/srcXTimenanosleeplong long unsigned intusleeptCurtEndnanosecondsusleep.cxil_printf.cgetnumdot_flaglinepoutnum__gnuc_va_listl_flag__ctype_ptrparams_sreg_save_arealong long intleft_flagdigitsbasexil_printfctrl1charptrargppad_charactertry_nextlong_flagnum1do_padding__va_list_tagctrloutbufnegativeoverflow_arg_areaparams_toutsnum2reservedXTime_WDTClearResetStatusXTime_DECDisableInterruptXtimextime_l.chighXTime_DECSetIntervalBitmaskXTime_FITDisableInterruptXTime_FITClearInterruptXTime_DECClearInterruptXTime_TSRClearStatusBitsXTime_WDTClearInterruptXTime_FITSetPeriodXTime_DECEnableAutoReloadXTime_DECDisableAutoReloadXTime_WDTEnableNextWatchdogXTime_WDTEnableInterruptXTime_SetTimeXTime_FITEnableInterruptXTime_WDTDisableInterruptXTime_DECEnableInterruptControlValXTime_GetTimeXTime_WDTResetControlXTime_WDTSetPeriod/cygdrive/c/ml510_bsb1_pcores_ppc440/ppc440_0/libsrc/xilkernel_v4_00_a/srcoutbyte.coutbyte/cygdrive/c/ml510_bsb1_pcores_ppc440/ppc440_0/libsrc/uartns550_v1_11_a/srcBaudMSBXuint32DataXUartNs550_SendByteInputClockHzBaudRateDivisorXUartNs550_SetBaudLcrRegisterxuartns550_l.cXUartNs550_RecvByteBaseAddressBaudLSBXuint8XIo_InSwap32XIo_In8IoContentsOutAddressHiWordXIo_In32Xuint16XIo_Out16ValueXIo_Out32XIo_In16XIo_EndianSwap32OLDXIo_Out8DestPtrInAddress/cygdrive/c/ml510_bsb1_pcores_ppc440/ppc440_0/libsrc/cpu_ppc440_v1_00_b/srcLoWordSourceXIo_OutSwap16XIo_InSwap16XIo_AddressXIo_EndianSwap16OLDxio.cXIo_OutSwap32Qq <(o(o`o`oooUUQq( S xmmL|nono<L[dLd`dlPdl`Pd`P`SHWDSHLQLqHSSHTnTxoQq\SSdTTUmm`X`dodWW,Y,0[4TYYQq4STS8SLXSSSSSS$XSSS S,0S<TSX\ShlSx|SSSS<lll<pmm<ZHZLZZZ Z0hZZ,ZZZZ0[ [ [[<LYYLYY<o`oo\oST0[0LZ <PdhPtxPPPPPPPPP$(PQ(qSTQLq S <nLPQPq(LtStmLTLTUT`iTQLqS<nT8mSS (S((S,4S<DSDDSltSSSGNU C crti.sGCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GCC: (GNU) 4.1.1 20060524 (Xilinx EDK 10.1.03 Build EDK_K_SP2.5 11 Jun 2008)GNU C crtn.s.symtab.strtab.shstrtab.text.init.fini.rodata.sdata2.sbss2.data.got1.got2.ctors.dtors.fixup.got.eh_frame.jcr.gcc_except_table.sdata.sbss.bss.stack.heap.boot0.boot.debug_aranges.debug_pubnames.debug_info.debug_abbrev.debug_line.debug_frame.debug_str.debug_loc.comment!t$' -5=DJPV]dkpz   <,@|("2S8=0API%Q`VW.]( #O h}       <,@ !"#@x''2= K Yly $d DH l   #)29BNW2g t p8x $' 1Kc pl ~X t ( d <@( 7DW<az<0,@    ' 8`\L d<@h = v}tPX <@    - <K^H(fs   < g K  (pL< I\k,@s Y <@@@  TT) =I8W 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