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** Copyright © 2008, Xilinx, Inc. 
** This design is confidential and proprietary of Xilinx, Inc. All Rights Reserved.
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**   ____  ____ 
**  /   /\/   / 
** /___/  \  /   Vendor: Xilinx 
** \   \   \/    Version: 1.0
**  \   \        Filename: hello_spi_readme.txt 
**  /   /         
** /___/   /\     
** \   \  /  \ 
**  \___\/\___\ 
** 
**Device: 
**Purpose:
**Reference: 
**   
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Application:  hello_spi
-----------------------
We will configure the FPGA, download code, and view the resulting output.  The
hello_spi application is meant to reside in the SPI flash memory device
and be used with the SPI serial Flash configuration mode of the Virtex-5.
However, before programming the SPI flash with this application, we will test
it by initializing the instruction and data memories with a download cable.
Once satisfied with the behavior of the program, we will program the SPI flash
with the application and re-check its behavior.

   CONFIG Switch Settings:  00010101 

1. Connect the Host PC to the ML510 (J9 header) using a PC-IV or
   Platform USB JTAG cable

2. Connect the Host PC serial port to the ML510 serial port using a null
   modem cable and launch a terminal program on the Host (eg. TeraTerm)
   with the settings: 9600 baud, 8-N-1, No flow control

3. Connect the ML510 to a DVI monitor or to a VGA monitor with the
   appropriate adapter 

4. Launch XPS and open the ML510 EDK project (ml510_bsb_system.xmp)

5. Launch a Shell window using XPS menu selection: Project > Launch EDK Shell

6. Download bitstream in shell window by typing: impact -batch etc/download.cmd

7. XPS menu selection: Debug > Launch XMD

8. At XMD% prompt type: dow ppc440_0/code/hello_spi.elf

9. At XMD% prompt type: con

10. We have just configured and downloaded the hello_spi application using
   the JTAG cable. The resulting output is shown below.


LCD Output:
-----------
Design Loaded
Using SPI Mem_

Serial Port Output:
-------------------
The FPGA has been configured from the SPI memory (SPI Config Mode)

DVI/VGA Output:
---------------
The FPGA has been configured from the SPI memory (SPI Config Mode)