******************************************************************************* ** Copyright © 2008, Xilinx, Inc. ** This design is confidential and proprietary of Xilinx, Inc. All Rights Reserved. ******************************************************************************* ** ____ ____ ** / /\/ / ** /___/ \ / Vendor: Xilinx ** \ \ \/ Version: 1.0 ** \ \ Filename: iic_ddr2_dimm0_readme.txt ** / / ** /___/ /\ ** \ \ / \ ** \___\/\___\ ** **Device: **Purpose: **Reference: ** ******************************************************************************* ** ** Disclaimer: LIMITED WARRANTY AND DISCLAIMER. These designs are ** provided to you "as is." Xilinx and its licensors make and you ** receive no warranties or conditions, express, implied, ** statutory or otherwise, and Xilinx specifically disclaims any ** implied warranties of merchantability, noninfringement, or ** fitness for a particular purpose. Xilinx does not warrant that ** the functions contained in these designs will meet your ** requirements, or that the operation of these designs will be ** uninterrupted or error free, or that defects in the Designs ** will be corrected. Furthermore, Xilinx does not warrant or ** make any representations regarding use or the results of the ** use of the designs in terms of correctness, accuracy, ** reliability, or otherwise. ** ** LIMITATION OF LIABILITY. In no event will Xilinx or its ** licensors be liable for any loss of data, lost profits, cost ** or procurement of substitute goods or services, or for any ** special, incidental, consequential, or indirect damages ** arising from the use or operation of the designs or ** accompanying documentation, however caused and on any theory ** of liability. This limitation will apply even if Xilinx ** has been advised of the possibility of such damage. This ** limitation shall apply notwithstanding the failure of the ** essential purpose of any limited remedies herein. ** ******************************************************************************* Application: iic_ddr2_dimm0 --------------------------- This IIC example consists of a polled mode design which uses the Xilinx IIC peripheral in dynamic mode along with its low-level driver to access the IIC interface of the DDR2 SDRAM SODIMM on the ML510 board. The SODIMM module contains a Serial Presence Detect (SPD) EEPROM which is accessible at address 0xA6 on the IIC chain. CONFIG Switch Settings: 00010101 1. Connect the Host PC to the ML510 (J9 header) using a PC-IV or Platform USB JTAG cable 2. Connect the Host PC serial port to the ML510 serial port using a null modem cable and launch a terminal program on the Host (eg. TeraTerm) with the settings: 9600 baud, 8-N-1, No flow control 3. Launch XPS and open the ML510 EDK project (ml510_bsb_system.xmp) 4. Launch a Shell window using XPS menu selection: Project > Launch EDK Shell 5. Download bitstream in shell window by typing: impact -batch etc/download.cmd 6. XPS menu selection: Debug > Launch XMD 7. At XMD% prompt type: dow ppc440_0/code/iic_ddr2_dimm0.elf 8. At XMD% prompt type: con Serial Port Output: ------------------- IIC Dynamic mode DDR2 SPD EEPROM access example - Calling DDR2 SPD EEPROM ReadByte Routine BytesRead = 64 ReadBuffer[0] = 80 ReadBuffer[1] = 08 ReadBuffer[2] = 08 ReadBuffer[3] = 0E ReadBuffer[4] = 0A ReadBuffer[5] = 60 ReadBuffer[6] = 48 ReadBuffer[7] = 00 ReadBuffer[8] = 05 ReadBuffer[9] = 30 ReadBuffer[10] = 45 ReadBuffer[11] = 02 ReadBuffer[12] = 82 ReadBuffer[13] = 08 ReadBuffer[14] = 08 ReadBuffer[15] = 00 ReadBuffer[16] = 0C ReadBuffer[17] = 04 ReadBuffer[18] = 38 ReadBuffer[19] = 00 ReadBuffer[20] = 01 ReadBuffer[21] = 00 ReadBuffer[22] = 03 ReadBuffer[23] = 3D ReadBuffer[24] = 50 ReadBuffer[25] = 50 ReadBuffer[26] = 60 ReadBuffer[27] = 3C ReadBuffer[28] = 1E ReadBuffer[29] = 3C ReadBuffer[30] = 2D ReadBuffer[31] = 80 ReadBuffer[32] = 40 ReadBuffer[33] = 40 ReadBuffer[34] = 30 ReadBuffer[35] = 30 ReadBuffer[36] = 3C ReadBuffer[37] = 1E ReadBuffer[38] = 1E ReadBuffer[39] = 00 ReadBuffer[40] = 00 ReadBuffer[41] = 3C ReadBuffer[42] = 69 ReadBuffer[43] = 80 ReadBuffer[44] = 18 ReadBuffer[45] = 22 ReadBuffer[46] = 0F ReadBuffer[47] = 00 ReadBuffer[48] = 00 ReadBuffer[49] = 00 ReadBuffer[50] = 00 ReadBuffer[51] = 00 ReadBuffer[52] = 00 ReadBuffer[53] = 00 ReadBuffer[54] = 00 ReadBuffer[55] = 00 ReadBuffer[56] = 00 ReadBuffer[57] = 00 ReadBuffer[58] = 00 ReadBuffer[59] = 00 ReadBuffer[60] = 00 ReadBuffer[61] = 00 ReadBuffer[62] = 12 ReadBuffer[63] = 02 Test passed