Your ML510 Evaluation Platform is a general purpose board that ships with a number of demonstration designs pre-installed on the Compact Flash card and Linear Flash memories. The ML510 Quickstart Tutorial describes these demonstration applications.
ML510 Quickstart Tutorial (PDF)The Xilinx Base System Builder (BSB) wizard helps users quickly build a working embedded processing system design through an easy to use GUI interface. The XPS project created by BSB can be run as generated or further enhanced with peripherals added from the EDK IP catalog. OS Applications are provided on the BSB & Reference Designs page
ML510 Reference Design User Guide (PDF)EDK 11.1 SP1 / ISE 11.1 SP1
The ML510 Evaluation Platform is built around the Virtex-5 XC5VFX130T FPGA with high performance RocketIO™ GTX transceivers. This design contains a tutorial demonstrating how to generate an IBERT design that exercises the GTX transceivers using the ChipScope™ Pro Serial IO Toolkit.
Using the Xilinx Core Generator™ Memory Interface Generator to build a DDR2 design. Includes ChipScope Pro addition and testing.
This Quickstart utilizes the ChipScope Pro System Monitor Console to display device voltages, temperatures, and external signal levels. The System Monitor feature is built into all Virtex-5 devices.
ML510 System Monitor Quickstart (PDF)The ML510 can be used to demonstrate a variety of Virtex-5 configuration methods. Initial board bring-up and testing can be accomplished with the Xilinx tools, a JTAG cable, along with the bitstreams and ELF files from the ML510 standalone applications page. Subsequently, ACE files containing both hardware and software initialization components can be generated and loaded from a CompactFlash card by the onboard System ACE™ CF controller. A new Virtex-5 configuration method loads bitstreams directly from a linear flash memory device. Demonstrating the various Virtex-5 configuration methods is user-selectable through a DIP switch.