Spartan-3E FPGA Starter Kit Board Design Examples

Below are example designs created for the Spartan®-3E FPGA Starter Kit board to demonstrate various features or capabilities. Documentation and source files are included. These example designs are provided with the Limitations described below.

Description Features Software Version Doc Files
Initial Design for the Spartan-3E FPGA Starter Kit Board
This is the design shipped with the board. The embedded PicoBlaze™ processor controller scrolls messages on the character LCD screen. The rotary pushbutton switch controls whether the switches or the rotary button controls the LEDs.

 

PicoBlaze processor, LCD, Rotary Encoder, LEDs ISE® 8.1i PDF ZIP

Default Xilinx CPLD Design

This is the default CPLD design shipped with the board.  The CPLD helps reduce the number of jumpers on the board and simplifies the interaction of all the possible FPGA configuration memory sources. The CPLD is user programmable and available for customer applications, with between 13 to 21 user-I/O pins and 58 remaining macrocells available beyond the required logic. See the XC2C64A CoolRunner™-II CPLD section of the Spartan-3E FPGA Starter Kit User Guide for more details.

Xilinx CoolRunner-II CPLD ISE 8.1i PDF ZIP
Low Cost Design Authentication for Spartan-3E FPGAs
This design introduces a low cost design authentication technique which can be an effective deterrent to prevent malicious copying of designs. The unique ID of the Intel StrataFlash parallel NOR memory is the key feature used in this design. Please note that this design is for the more experienced user of Spartan-3E FPGAs.
PicoBlaze processor,
RS232, LEDs, NOR Flash
ISE 8.2i PDF n ZIP
Rotary Encoder Interface
Demonstrates how to use the rotary encoder portion of the rotary pushbutton switch.

 

Rotary Encoder ISE 8.1i PDF ZIP
PicoBlaze Processor Amplifier and A/D Converter Controller
Demonstrates the fundamental operation the Linear Technology LTC6912-1 programmable gain amplifier and the Linear Technology LTC1407A analog-to-digital (A/D) converter. The results are displayed on the character LCD screen. The SPI-based communication to the amplifier, the A/D controller, and the LCD screen is performed using the PicoBlaze processor controller.

 

PicoBlaze processor, LCD, Amplifier, A/D ISE 8.1i PDF ZIP
PicoBlaze Processor D/A Converter Controller
Demonstrates the Linear Technology LTC2624 digital-to-analog (D/A) converter. The SPI-based communication to the D/A controller is performed using the PicoBlaze processor controller.

 

PicoBlaze processor, D/A ISE 8.1i PDF ZIP
PicoBlaze RS-232 StrataFlash™ Programmer
Turns the Spartan-3E FPGA into an Intel StrataFlash programmer. The FPGA connects to a PC via an RS232 UART. Via HyperTerminal (not included), download an MCS file to the Intel StrataFlash parallel NOR Flash memory, check the memory ID, bulk erase the entire 128Mbit Flash, and read and write Flash data.
PicoBlaze processor, RS232,
NOR Flash
ISE 8.1i PDF ZIP
PicoBlaze Processor SPI Flash Programmer
Turns the Spartan-3E FPGA into an SPI serial Flash programmer. The FPGA connects to a PC via an RS232 UART. Via HyperTerminal (not included), download an MCS file to the STMicro M25P16 SPI Flash, check the memory ID, bulk erase the SPI Flash, and read Flash data.

 

PicoBlaze processor, RS232,
SPI Flash
ISE7.1i PDF ZIP
Using SPI Serial Flash
Demonstrates various aspects of using the STMicro M25P16 16Mbit SPI serial Flash with the Spartan-3E FPGA. Configure FPGA from SPI Flash. Store FPGA bitstreams in SPI Flash. Program SPI Flash using the FPGA. Merge MicroBlaze™ processor code with the FPGA bitstream and store in SPI Flash. Boot the FPGA from SPI Flash and code shadow MicroBlaze processor code into DDR SDRAM.

 

MicroBlaze processor, DDR SDRAM, RS232,
SPI Flash
ISE 9.2i
EDK 9.2i
PDF ZIP
PicoBlaze Processor Frequency Generator
Converts the Spartan-3E FPGA Starter Kit into a reasonably accurate frequency generator covering the nominal range 1 Hz to 100 MHz. The design allows you to attempt generation of higher frequencies to allow you to experiment with the maximum performance of the Spartan device on your board. The rotary control is used to edit the frequency displayed on the upper line of the LCD display..

 

PicoBlaze processor, LCD, Rotary Encoder ISE 8.2i PDF ZIP
PicoBlaze Processor Frequency Counter
Converts the Spartan-3E FPGA Starter Kit into a reasonably accurate frequency counter measuring frequencies up to 200MHz as well as providing two different types of on-chip oscillator for test and evaluation.

 

PicoBlaze processor,
LCD
ISE 8.1i PDF ZIP
PicoBlaze Processor DS2432 Communicator
Allows you to investigate the Dallas Semiconductor DS2432 device which is a 1kb Protected EEPROM with internal SHA-1 Engine. Employs the PicoBlaze processor to implement all the 1-wire communication protocol and provide a simple user interface on your PC via the RS232 serial port. The design may be of interest to anyone using the DS2432 or other 1-wire devices in their own designs.
DS2432, PicoBlaze processor, RS232 ISE 8.1i PDF ZIP
PicoBlaze Processor DS2432 SHA-1 Algorithm
Allows you to program the 64-bit secret into the Dallas Semiconductor DS2432 device and then compare the Message Authenticated Codes (MAC) generated by the DS2432 with those computed by the PicoBlaze processor. This design builds on the ‘Communicator Design’ and again provides a simple user interface on your PC via the RS232 serial port. The design will be of interest to those serious about investigating the security properties of the DS2432 and how they can be included in real designs.

DS2432, PicoBlaze processor, RS232 ISE 8.1i PDF ZIP
Pulse Width Modulation (PWM) Generation and Control with PicoBlaze Processor
The PicoBlaze processor generates 12 channels of PWM with a PRF of 1KHz and duty cycle resolution of 8-bits (256 steps). Simple commands entered via HyperTerminal (not included) allow the duty cycle for each channel to be set independently with 8 of the channels controlling the intensity of the 8 LEDs and the remaining 4 channels provided as direct outputs on the J4 connector. This design also facilitates rapid changes to the PicoBlaze processor program stored in Block Memory with a second program included for immediate download.
PicoBlaze processor, RS232, LEDs, J4 Connector ISE 8.1i PDF ZIP
Connect LCD to MicroBlaze Processor Using an OPB Customer Peripheral
Shows how to use an OPB peripheral to connect the Spartan-3E Starter Kit board's LCD to the MicroBlaze soft processor.

Thanks to George Wang for submitting this design!
MicroBlaze processor,
LCD
ISE 8.2i PDF ZIP
PicoBlaze Processor Real Time Clock
A clock to display time, date and week on the LCD module. The time and date can be set through pressing and turning the rotary encoder on the starter kit board. The PicoBlaze processor automatically calculates what day the date set is.

Thanks to George Wang for submitting this design!
PicoBlaze processor, LCD, Rotary Encoder ISE 8.1i PDF ZIP
System Generator for DSP: Performing Hardware-in-the-Loop
System Generator supports hardware co-simulation, making it possible to incorporate into a Simulink simulation a design running in actual FPGA hardware.   The quick start design guides you through the process of setting up the Spartan-3E FPGA Starter Kit to perform hardware-in-the-loop verification with JTAG co-simulation via the USB configuration port.  This methodology applies to any Xilinx FPGA board with a JTAG connection.
JTAG USB Port ISE 8.1i,System Generator PDF ZIP
Implementing and Testing Efficient Video Line Stores
This design serves two quite different purposes. You may be interested in one particular aspect or both.

Hardware Development and Testing of Macros -
The design provides an example of how the Starter Kit can be used as a test bed for macros enabling real implementations to be evaluated during development. This technique can be applied to many parts of designs and helps reduce the burden of testing and debugging when putting a final system together. In this example the PicoBlaze processor is used as a convenient way to control and monitor the macros under test with an RS232 link to the PC providing the human interface.

Efficient Video Line Store Macros -
The macros under evaluation are a set of highly efficient video line stores implemented using Block Memory. This reference design provides 7 ready to use line store macros.

PicoBlaze processor, LEDs, RS-232 ISE 8.2i PDF ZIP
XAPP983 Executing and Debugging Software from Flash Memory
This design shows how to put MicroBlaze processor code into Flash memory.
MicroBlaze processor ISE 9.1i
EDK 9.1i
PDF ZIP
XAPP1016 Getting Started with the Nucleus PLUS RTOS and EDGE Tools on the MicroBlaze Processor
This document is a tutorial for building MicroBlaze processor hardware to run the Nucleus Real Time Operating System, for configuring the Board Support Package within Xilinx Platform Studio, and for using Mentor Graphics EDGE features, such as the application debug.

MicroBlaze processor, RS232 ISE 9.1.03i
EDK 9.1.02i
xapp1016 ZIP
Limitations

Limited Warranty and Disclaimer. These designs are provided to you “as is”. Xilinx and its licensors make and you receive no warranties or conditions, express, implied, statutory or otherwise, and Xilinx specifically disclaims any implied warranties of merchantability, non-infringement, or fitness for a particular purpose. Xilinx does not warrant that the functions contained in these designs will meet your requirements, or that the operation of these designs will be uninterrupted or error free, or that defects in the Designs will be corrected. Furthermore, Xilinx does not warrant or make any representations regarding use or the results of the use of the designs in terms of correctness, accuracy, reliability, or otherwise.

Limitation of Liability. In no event will Xilinx or its licensors be liable for any loss of data, lost profits, cost or procurement of substitute goods or services, or for any special, incidental, consequential, or indirect damages arising from the use or operation of the designs or accompanying documentation, however caused and on any theory of liability. This limitation will apply even if Xilinx has been advised of the possibility of such damage. This limitation shall apply notwithstanding the failure of the essential purpose of any limited remedies herein.

These design modules are not supported by Xilinx Technical support as an official Xilinx Product.

 
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