| All reference designs now support ISE® Design Suite 10.1.03 design tools including Xilinx Platform Studio™ 10.1.03 and System Generator™ for DSP 10.1.03. |
| The video accelerator blocks developed for the reference designs have been upgraded to now use the PLB v4.6 Bus when communicating with the MicroBlaze™ processor. |
| Reference designs that use the Video Frame Buffer Controller (VFBC) have been updated to now use the MPMC4 + VFBC IP core released as part of Platform Studio’s Embedded IP Catalog. Previous versions of the reference designs used MPMC3 with a VFBC reference design. |
| The Video Starter Kit Camera and DVI reference designs have been enhanced to now support the following HD and extended video resolutions: VGA, 720x480P/I, 720x576/IP, SVGA, XGA, 720P, 1080I/P. |
| The camera reference design now provides the ability to capture up to 256 MB of live video that can be saved to disk for use in testing and debug with simulation environments such as C/C++, MATLAB® or Simulink®. |
A new reference design is now included with the VSK that supports S-Video processing with the following features:
- S-Video in and out
- Image processing example on interlaced data
- Image data written into frame buffer as progressive (weave option, not de-interlacing)
- Reading from memory de-weave(s) image data for S-Video output
- Interlaced image processing and frame buffer management
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Support for ISE Design Suite 10.1.03 Development Environment