ISE Design Suite: DSP Edition
The ISE® Design Suite: DSP Edition includes all of the features and technologies found in the ISE Design Suite: Logic Edition plus additional tools and DSP-specific IP addressing the special needs of the DSP designer. Developers with little FPGA design experience can quickly create production quality FPGA implementations of DSP algorithms in a fraction of traditional RTL development times.
ISE Design Suite: DSP Edition Benefits
The ISE Design Suite: DSP Edition delivers a comprehensive design suite that extend The Mathworks widely popular MATLAB and Simulink® modeling environments for FPGA design. This DSP design environment can be used early in the design flow to explore hardware solutions for high-level algorithms or to assemble complete DSP systems for production that are highly optimized and include RTL, IP and embedded processing.
The ISE Design Suite: DSP Edition includes System Generator for DSP™ providing the industries most flexible, integrated and powerful DSP development environment for FPGAs.
The ISE Design Suite: DSP Edition is designed to help you develop tailored high performance DSP solutions for aerospace and defense, digital communications, multimedia, video, and imaging markets.
System Generator for DSP, included with the ISE Design Suite: DSP Edition, comes complete with an optimized, bit and cycle accurate library for assembling sophisticated signal processing systems. Xilinx algorithmic IP is an integral part of this library and is used to rapidly create efficient implementations of common DSP building blocks such as FIR filters, FFTs and forward error correction (FEC) blocks.
With its comprehensive environment, the ISE Design Suite: DSP Edition streamlines development using industry standard development tools for your DSP designs. Using MATLAB and Simulink from The Mathworks™, coupled with Xilinx System Generator for DSP, you can now model, simulate, and verify your signal processing algorithms on your target hardware platform without leaving the Simulink environment.
ISE Design Features Table
| Features | ISE WebPACK | Logic Edition | Embedded Edition | DSP Edition |
|---|---|---|---|---|
| System Generator for DSP | ||||
| Platform Studio | (Device locked to three smallest Zynq devices) | (Device locked to three smallest Zynq devices) | (Device locked to three smallest Zynq devices) | |
| Software Development Kit | ||||
| MicroBlaze Soft Processor | ||||
| MicroBlaze Microcontroller System | ||||
| Design Preservation | ||||
| Project Navigator | ||||
| CORE Generator | ||||
| PlanAhead | ||||
| ChipScope Pro and the ChipScope Pro Serial I/O Toolkit | ||||
| Partial Reconfiguration* | ||||
| Power Optimization | ||||
| ISE Simulator (ISim) | (Limited) | |||
| XST Synthesis | ||||
| Timing Driven Place & Route, SmartGuide, and SmartXplorer |
* Can be purchased as an option.
Key Documentation
| Name | File Size | Modified Date |
|---|---|---|
| What's New in ISE Design Tools 14.4/2012.4 | 03/04/2013 | |
| ISE Design Suite Manuals | ||
| ISE Design Suite Product Brief | ||
| System Generator for DSP User Guides | ||
| WP374 - Partial Reconfiguration of Xilinx FPGAs Using ISE Design Suite | 377 KB | 05/30/2012 |
| WP370 - Reducing Switching Power with Intelligent Clock Gating | 395 KB | 03/01/2011 |
| WP409 - Floating Point DSP Algorithms with Xilinx FPGAs | 03/04/2013 |