ISE Design Suite: System Edition
An integrated software solution supporting the combined methodologies of logic/connectivity, embedded, and DSP design
The ISE® Design Suite: System Edition includes all of the features and technologies found in the ISE Design Suite: Logic Edition, DSP Edition, and Embedded Edition.
Achieve Greater Designer Productivity
The idea of system design is to integrate different domains to better leverage resources within the FPGA. With applications which rely more and more on functions for Digital Signal Processing, or DSP, significant performance benefits are possible through the ISE Design Suite: System Edition which enables the use of accelerators which can be leveraged by the processor. In fact, one of the big benefits of FPGA specific system design is the ability perform system partitioning, managing the tradeoffs over what’s implemented in software and what’s implemented in software. For many users, algorithms are not necessarily optimized for low level HDL languages.
Attain Breakthrough Performance, Power and Cost Benefits
Create your own custom-processing platform while reducing your system cost by consolidating external functions into an FPGA. Select the perfect balance of feature and size for your system, and optimize hardware/software design trade-offs for the best price-performance results that meet your exacting requirements.
Focus on Design Differentiation
The ISE Design Suite: System Edition provides a comprehensive suite of integrated development environment, software tools, configuration wizards, and IP that facilitates your design and utilizes all of the flexibility offered by a programmable platform. Xilinx CORE Generator™ System, included in all Editions of the ISE Design Suite, accelerates design time by providing access to highly parameterized Intellectual Properties (IP) for Xilinx FPGAs and is included in the ISE Design Suite. The available user-customizable IP functions range in complexity from commonly used functions, such as memories and FIFOs, to system-level building blocks, such as filters and transforms. Using these IP blocks can save days to months of design time. The highly optimized IP allows FPGA designers to focus efforts on building designs quicker while helping bring products to market faster.
ISE Design Features Table
| Features | ISE WebPACK | Logic Edition | Embedded Edition | DSP Edition |
|---|---|---|---|---|
| System Generator for DSP | ||||
| Platform Studio | (Device locked to three smallest Zynq devices) | (Device locked to three smallest Zynq devices) | (Device locked to three smallest Zynq devices) | |
| Software Development Kit | ||||
| MicroBlaze Soft Processor | ||||
| MicroBlaze Microcontroller System | ||||
| Design Preservation | ||||
| Project Navigator | ||||
| CORE Generator | ||||
| PlanAhead | ||||
| ChipScope Pro and the ChipScope Pro Serial I/O Toolkit | ||||
| Partial Reconfiguration* | ||||
| Power Optimization | ||||
| ISE Simulator (ISim) | (Limited) | |||
| XST Synthesis | ||||
| Timing Driven Place & Route, SmartGuide, and SmartXplorer |
* Can be purchased as an option.