Although Ethernet is known as a networking and system-to-system protocol, it has been adapted to other applications, including the backplane. Ethernet is a popular protocol choice in FPGAs because of its flexibility, reliability, and performance.
Whether you are designing low cost 10/100 Ethernet applications with Spartan®-6 FPGAs or multi-port gigabit Ethernet applications with Virtex®-6 FPGAs, Xilinx has an Ethernet solution for you.
Implemented in 40-nm technology, the Virtex-6 FPGA incorporates four tri-mode Ethernet MAC hard blocks that support a wide variety of PHY interfaces from MII using SelectIO™ technology, to SGMII using the GTP transceivers.
The development kit provides everything you need to get started with Ethernet, including proven IP and protocol-specific characterization reports.
| Market | Applications | Engineer Benefit | FPGA Family |
| Wired networking and telecom and wireless | Port aggregation, GbE backplane control plane, XAUI fabric interface, LAN ports | Low-latency, four integrated tri-mode Ethernet MACs | Kintex™-7 |
| Servers and storage | Proprietary NIC and HBA, Backplane control plane | Low power GTPs for power sensitive data center applications | Kintex-7 Virtex-7 Virtex-6 Virtex-5 Spartan-6 Spartan-3 |
| Test and measurement | Remote data capture | SelectIO interfaces for high speed DACs/ADCs, Integrated DSP48 Blocks and memory interfaces for data storage and processing | Kintex-7 Virtex-7 Virtex-6 Virtex-5 Spartan-6 Spartan-3 |
| Industrial, scientific and medical | Industrial automation equipment, medical imaging, wafer inspection | Flexible and scalable solutions | Kintex-7 Virtex-7 Virtex-6 Virtex-5 Spartan-6 Spartan-3 |
| Audio, visual, broadcast | Video processing card | Integrated tri-mode MAC enables FPGA usage for DSP-intensive applications | Kintex-7 Virtex-7 Virtex-6 Virtex-5 Spartan-6 Spartan-3 |
| Consumer | Docking station, workstation, gaming PC | Cost effective and out-of-box Ethernet solution | Kintex-7 Virtex-7 Spartan-6 Spartan-3 |
| Aerospace/defense | Guidance systems, control systems, simulators | Industrial temperature range | Kintex-7 Virtex-7 Spartan-6 Spartan-3 |
| 40G/100G Ethernet IP | FPGA Device | Technical Documents | UNH IOL Tests | Characterization Report |
| 40G/100G EMAC | Kintex-7, Virtex-7, Virtex-6 HXT, LXT, SXT Virtex-5 FXT, TXT |
Documentation | IEEE 802.3BA compliant – will be UNH tested when available | Reports |
| 10 Gigabit Ethernet IP | FPGA Device | Technical Documents | UNH IOL Tests | Characterization Report |
| 10G EMAC | Zynq™-7000, Artix™-7, Kintex-7, Virtex-7, Virtex-6, Virtex-5, Virtex-4 FX, Virtex-II Pro, Spartan-6 LXT | Documentation | Successful | Report |
| 10 Gigabit Ethernet PCS/PMA with FEC/Auto-Negotiation (10GBASE-KR) | Kintex-7, Virtex-7 | Documentation | Coming Soon | Report |
| 10 Gigabit Ethernet PCS/PMA (10GBASE-R) | Kintex-7, Virtex-7, Virtex-6 HXT | Documentation | Successful | Report |
| RXAUI | Zynq-7000, Artix-7, Kintex-7, Virtex-7, Virtex-6 | Documentation | N/A | Coming Soon |
| XAUI | Zynq-7000, Artix-7, Kintex-7, Virtex-7, Virtex-6, Virtex-5, Virtex-4 FX, Virtex-II Pro, Spartan-6 LXT | Documentation | Successful | Report |
| Gigabit Ethernet IP | FPGA Device | Technical Documents | UNH IOL Tests | Characterization Report |
| Virtex-6 Embedded Tri-mode Ethernet MAC Wrapper | Virtex-6 | Documentation | Coming Soon | Coming Soon |
| Tri-mode Ethernet Wrapper for Integrated Block | Virtex-5 | Documentation | Successful | Report |
| Tri-mode Ethernet Wrapper for Integrated Block | Virtex-4 FX | Documentation | Successful | Report |
| Tri-mode Ethernet Soft IP | Zynq-7000, Artix-7, Kintex-7, Virtex-7, Virtex-6, Virtex-5, Virtex-4 FX/SX/LX, Virtex-II Pro, Virtex-II, Spartan-3A DSP, Spartan-6, Spartan-3A/3AN, Spartan-3, Spartan-3E | Documentation | Successful | Report |
| AXI Ethernet | Zynq-7000, Artix-7, Kintex-7, Virtex-7, Virtex-6 HXT, Virtex-6 LXT, Virtex-6 SXT, Spartan-6 LX, Spartan-6 LXT | Documentation | Successful | Report |
| XPS_LL_TEMAC | Virtex-6, Virtex-5 SXT/LXT/LX,
Virtex-4 FX/SX/LX Spartan-6, Spartan-3A DSP, Spartan-3A/3AN |
Documentation | Successful | Report |
| Ethernet AVB | Zynq-7000, Artix-7, Kintex-7, Virtex-7, Virtex-6 LXT, Virtex-6 SXT, Virtex-5 FXT, Virtex-5 LX, Virtex-5 LXT, Virtex-5 SXT, Spartan-6 LX, Spartan-6 LXT, Spartan-3A, Spartan-3A DSP, Spartan-3AN, Spartan-3E | Documentation | N/A | N/A |
| QSGMII | Zynq-7000, Artix-7, Kintex-7, Virtex-7 | Documentation | Successful | N/A |
| Ethernet 1000BASE-X PCS/PMA | Artix-7, Kintex-7, Virtex-7, Virtex-6, Virtex-5, Virtex-4 FX/SX/LX, Virtex-II Pro, Virtex-II, Spartan-6, Spartan-3A DSP, Spartan-3A/3AN, Spartan-3, Spartan-3E | Documentation | Successful | Report |
| 10/100 Ethernet IP | FPGA Device | Technical Documents | UNH IOL Tests | Characterization Report |
| AXI Ethernet Lite | Zynq-7000, Kintex-7, Artix-7, Virtex-7, Virtex-6 HXT, Virtex-6 LXT, Virtex-6 SXT, Spartan-6 LXT | Documentation | N/A | N/A |
| XPS Ethernet Lite | Virtex-6, Virtex-5, Virtex-4 FX/SX/LX, Spartan-6 LX, Spartan-6 LXT, Spartan-3A, Spartan-3A/3AN, Spartan-3E | Documentation | N/A | N/A |
| Other IP | FPGA Device | Technical Documents | UNH IOL Tests | Characterization Report |
| Ethernet Statistics * | Virtex-6, Virtex-5, Virtex-4 FX/SX/LX, Virtex-II Pro, Virtex-II, Spartan-6, Spartan-3A DSP, Spartan-3A/3AN, Spartan-3, Spartan-3E * Function has been merged into AXI TEMAC and is available in all support devices for AXI TEMAC |
Documentation | N/A | N/A |
EMAC Lite is the recommended Ethernet IP for designs using MicroBlaze soft processors. EMAC Lite is a lightweight interface between the built-in tri-mode MACs and the soft IP processor. Platform Studio uses EMAC Lite to easily integrate MACs with the MicroBlaze processor.
The robust high-performance Processor Local Bus (PLB) interface helps you maximize hard processor capabilities and easily interface between the integrated PowerPC processor and tri-mode MACs. Platform Studio allows easy integration of the IP.
A lightweight wrapper interface IP easily and efficiently interfaces to the built-in tri-mode MACs when no embedded processor is available. When instantiated through CORE Generator™ software, reference design IP is also produced. Designs can be quickly and efficiently integrated in the FPGA.