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While PCI™ and PCI-X™ use parallel buses, PCI Express® version is a general-purpose serial I/O interconnect that can be leveraged for communications, embedded, storage, server, mobile, and desktop applications. It can also be used as a peripheral device interconnect, a chip-to-chip interface, and a bridge to other standards such as 1394b, USB2.0, InfiniBand™ and Ethernet. Why use the Xilinx solution for PCIe?Implemented in 65-nm technology, the Virtex®-5 FPGA end-point block for PCI Express 1.1 is low-risk and standards-compliant. The corresponding development kit incorporates proven IP and protocol-specific characterization reports. ![]()
Xilinx PCI Express version 2.0 Support - Virtex-5 FXT is the first FPGA to support 5Gbps x8 PCI Gen2 appplicationsThe Virtex-5 FXT FPGA platform has passed the latest PCI Express Endpoint Version 2.0 based specification testing in the compliance workshop #62, the first workshop for Version 2.0 testing, and is now listed on the PCI-SIG® Integrator’s list when the workshop #62 & 63 results are published. Virtex-5 FXT devices are the first FPGAs to support 5Gbps x8 PCI Gen 2 applications. In addition to the highly optimized Virtex-5 FXT programmable platform, Xilinx enables system designers interested in implementing PCIe Version 2.0 systems to accelerate development of products by providing a broad range of design resources, including intellectual property (IP), development platforms, characterization report, and reference designs. Xilinx teamed up with key alliance members to provide a comprehensive suite of design resources, including IP cores for
All solutions are PCIe v1.0a compliant. Virtex-5 FXT, SXT and LXT FPGA solutions have also passed v1.1 testing. In addition, Virtex-5 FXT solutions have just passed v2.0 testing. Choose the Correct Solution for Your ApplicationMulti-lane (High-Performance)The 40-nm Virtex-6 LXT/SXT FPGA series is ideal for multilane PCI Express applications with up to 8 lanes. It includes:
You can design a complete PCIe v2.0 endpoint or root port solution with our simple CORE Generator™ flow. The Virtex-6 LogiCORE™ IP Block Plus Wrapper for PCI Express version 2.0 provides:
The Virtex-6 FPGA solution offers the highest performance, lowest power, and smallest footprint.
The Virtex-5 FPGA solution offers the highest performance, lowest power, and smallest footprint.
Contact Xilinx Alliance members for Virtex-5 PCIe Gen2 design resource. The Virtex-4 FX FPGA and Virtex-II Pro FPGAs offer powerful integrated Multi-Gigabit Transceivers (MGTs) up to 6.5Gbps and soft IP to enable a solution for PCI Express:
Single Lane (Low Cost)The Spartan-6 FPGA family is ideal for single lane solutions for PCI Express. Xilinx with an integrated single-lane PCI Express core and Integrated PHY (transceiver) offers the lowest-cost 1-lane integrated programmable solution for PCI Express using a configurable Xilinx Integrated Endpoint LogiCORE IP for PCI Express.
The Spartan-3 FPGA solution offers a low power, low cost and small footprint single lane solution
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