DDR3 SDRAM

An Evolutionary Step Forward

DDR3 SDRAM architecture extends the capabilities of DDR2 SDRAM, providing:

• Lower power consumption (1.5V vs. 1.8V I/O and power supply)
• Improved I/O signaling for better signal integrity
• Increased data rates for higher system performance

7 Series FPGAs

UG586 - 7 Series FPGAs Memory Interface Solutions User Guide (PDF)
The 7 Series FPGAs Memory Interface Solutions User Guide provides information about using, customizing, and simulating LogiCORE™ IP memory interface cores for the 7 Series FPGAs.

Virtex-6 FPGAs

UG406 - Virtex®-6 FPGA Memory Interface Solutions User Guide (PDF)
The Virtex-6 FPGA Memory Interface Solutions User Guide provides information about using, customizing, and simulating LogiCORE  IP memory interface cores for the Virtex-6 FPGA.

Application Notes and Reference Designs

XAPP739 - AXI Multi-Ported Memory Controller (PDF)
XAPP739 Design Files (ZIP) (Requires registration)
XAPP739 application note demonstrates how to create a basic DDR3 MPMC design using the ISE® Design Suite Logic Edition tools, including Project Navigator (ProjNav) and the CORE Generator™ tool..

Spartan-6 FPGAs

UG388 - Spartan®-6 FPGA Memory Controller User Guide (PDF)

Virtex-5 FPGAs

Application Notes and Reference Designs

XAPP867- Implementing DDR3 Interfaces in Virtex-5 FPGAs (PDF)
XAPP867 describes the DDR3 SDRAM reference design including the controller and the capture technique for high performance 800 Mbps interfaces.

Memory Vendors

Micron Technology DDR3 SDRAM

Other Resources

Online Demo: Using Vivado MIG