QDR/QDRII SRAM

Resources for QDR/QDRII SRAM

The QDR consortium (Cypress, Renesas, IDT, NEC, and Samsung) defined and developed the Quad Data Rate (QDR) SRAM technology for high-performance communications applications. Developed with some of the industry's top system architects, the QDRII and DDRII architectures are additions to the QDR/DDR family of products. The QDRII SRAM architecture provides dedicated input and output ports that independently operate at double data rate (DDR). This results in four data transfers per clock cycle and overcomes bus contention issues.

Xilinx offers a comprehensive set of solutions and collateral to help customers interface to QDRII and QDR SRAMs.

Application Notes and Reference Designs

XAPP853 - QDRII SRAM Interface for Virtex-5 FPGAs (PDF)

XAPP703 - QDRII SRAM Interface for Virtex-4 FPGAs (PDF)

Memory Interface Generator (MIG) - Generate your Virtex-5, Virtex-4, and Spartan™-3 generation memory interface reference designs, including HDL code and pin placements, using this user friendly tool.

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Vendors

Samsung QDRII SRAM Data Sheets
Cypress Semiconductor  QDRII SRAM Data Sheets  and  QDRII Application Notes

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