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Video Starter Kit - Reference Designs

The Reference designs listed below have been specifically created for the Video Starter Kit Evaluation platform. They are available “as is”, and can be customized, or used.

HDL
Source
ZIP file
User Guide
Date
Verilog interface for Video IO Daughter card
Verilog
4/24/2006
This reference design provides Verilog code to support the various IO interfaces available on the Video IO Daughter card: DVI In and Analog Out, Composite, S-video and Component. A second reference design demonstrate the SDI interface with a Loopthrough example.
VIODC SDI Demonstration
Verilog
11/16/2006
This reference design provides Verilog code to support a demonstration of the capabilities of the SDI input and output interfaces on the Video IO Daughter Card (VIODC). The demo can transmit and receive various digital video formats, both high-definition (HD) and standard-definition (SD) using the SDI receiver and transmitter on the VIODC.  (The VSK is a demonstration platform only. For HD-SDI verification and compliance, Xilinx recommends using the Cook Technologies SDV board).
Video Decompression
VHDL
4/24/2006
Demonstrate the MPEG4 Decoder Part 2 running on the ML402 platform. Also included with this design is a DDR Memory Controller, Color Space Converter, VGA interface and MicroBlaze.
System Generator for DSP
Source
ZIP file
User Guide
Date
Ethernet Cosimulation
Sysgen 9.1
7/15/07
Sysgen 8.2
11/16/2006
Contains a run-tim block for point-to-point Ethernet hardware co-simulation. The example includes a 5x5 reloadable filter operator and demonstrates how hardware co-simulation may be used for high-throughput signal processing applications.
VSK Processor Core Tutorials
Sysgen 9.1
7/15/07
Sysgen 8.2
11/16/2006
Learn to create a processor core (pcore) in System Generator, and export or import it to and from Platform Studio.
VSK Diagnostics
Sysgen 9.1
7/15/07
Sysgen 8.2
11/16/2006
Includes a Platform Studio/System Generator based reference design for the Video Starter Kit. The diagnostics demonstration provides the user with the ability to dynamically select between various input/output configurations.  The MicroBlaze processor interface allows the user to view and modify the peripheral register settings in real-time.
VSK StandAlone
Sysgen 9.1
7/15/07
Sysgen 8.2
11/16/2006
Includes a System Generator based reference design for the Video Starter Kit. The standalone demonstration provides the user with the ability to statically configure the input and output without using a MicroBlaze processor.
Compact Flash
Source
ZIP file
Date
Compact Flash Card
ISE/Sysgen 8.1SP1
4/24/2006
ISE/Sysgen 8.2
11/16/2006
This file can be used to reprogram a 32MB Compact Flash card with the latest MPEG4, Diagnostics and Hardware Cosimulation reference designs.
VSK System ACE
4/24/2006
Includes necessary information and files to create a new SystemAce Compact Flash for the Video Starter Kit.
Video IO Daughter Card Schematic and Layout
ZIP file
Date
VIODC Schematic
11/22/2005
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