SystemVue FPGA

Device Family Support

• Artix-7
• Kintex-7
• Spartan-6 LX
• Virtex-4 LX
• Virtex-5 LX
• Virtex-6 LXT
• Virtex-7
• Zynq

The W1462 SystemVue FPGA Architect dramatically cuts design time and verification effort for System Architects and Algorithm Developers doing communications system design at the physical layer (PHY). It adds fixed-point hardware-true simulation models and a VHDL/Verilog hardware implementation path to the SystemVue environment. Rapid-prototyping and verification of hardware effects at the system level help architects get working PHY's on the air faster than ever before. SystemVue combines an easy to use environment with native polymorphic modeling and proprietary simulation technology to create an enhanced electronic system-level (ESL) design flow that "speaks RF". SystemVue is designed specifically for the task of Communications PHY architects and hardware designers. It allows rapid investigation and creation of algorithms and signal processing architectures, as well as rapid prototyping, verification, and re-use, all the way from math fragment to live test equipment. SystemVue therefore helps system designers in aerospace/defense and commercial wireless turn their physical layer concepts into proven designs faster and with higher confidence than was possible before.

Key Features

• undefined

Target Markets

• Wireless Communications