SpyGlass

Device Family Support

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Using many advanced algorithms and analysis techniques, SpyGlass provides designers with insight about their design, early in the process at RTL. It functions like an interactive guidance system for design engineers and managers, finding the fastest and least expensive path to implementation for complex SoCs. SpyGlass contains a wide array of chip analysis algorithms.Spanning formal techniques, global placement and routing, synthesis, extraction and a variety of simulation, timing, test and power engines, SpyGlass utilizes this technology to create a hardware virtual prototype of the design. This hardware virtual prototype is then analyzed to provide valuable information about what the design will look like after implementation. The hardware virtual prototype can also be optimized to create a design that meets the power, performance and area requirements of the project early in the design process, at RTL.

Key Features

• •A complete set of electrical rules checks to ensure netlist integrity
• •Customizable framework to capture and automate company expertise
• •High performance and capacity to rapidly analyze complex, multimillion-gate designs
• •Industry-leading comprehensive clock and reset analysis
• •Integrated debug environment enables easy cross-probing among violation reports, schematic and RTL source
• •Sophisticated static and dynamic analysis--identifies critical design issues at RTL
• •Supports Verilog, VHDL, V2K, SystemVerilog and mixed-language designs
• •The most comprehensive knowledge base of design expertise and industry-standard best practices

Target Markets

• Broadcast
• Automotive
• High Performance Computing
• Consumer
• Aerospace & Defense
• Industrial Scientific Medical
• Wired Communications
• Wireless Communications