Questa CDC

Device Family Support

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Designers increasingly use advanced multi-clocking architectures to meet the high-performance and low-power requirements of their chips. The Questa® Clock-Domain Crossing (CDC) Verification solution focuses on the interaction between these clock domains. Questa CDC addresses a number of critical verification issues that simply cannot be dealt with by simulation-based verification techniques. An RTL or gate-level simulation of a design that has multiple clock domains does not accurately capture the timing related to the transfer of data between clock domains. As a consequence, simulation does not accurately predict silicon behavior, and critical bugs may escape the verification process. The Questa CDC Verification solution solves this problem.

Key Features

• CDC protocol verification
• CDC reconvergence verification
• Structural or static CDC analysis

Target Markets

• Broadcast
• Automotive
• High Performance Computing
• Consumer
• Aerospace & Defense
• Industrial Scientific Medical
• Industrial Scientific Medical
• Wired Communications
• Wireless Communications