Encounter Conformal Equivalence Checker

Device Family Support

• Artix-7
• Kintex-7
• Spartan-3
• Spartan-6 LX
• Virtex-4 LX
• Virtex-5 LX
• Virtex-6 LXT
• Virtex-7
• Zynq

Cadence® Encounter® Conformal® Equivalence Checker (EC) makes it possible to verify and debug multi-million–gate designs without using test vectors. It offers the industry’s only complete equivalence checking solution for verifying SoC designs—from RTL to final LVS netlist (SPICE)—as well as FPGA designs. Encounter Conformal EC enables designers to verify the widest variety of circuits, including complex arithmetic logic, datapaths, memories, and custom logic.

Key Features

• Enables faster, more accurate bug detection and correction throughout the entire design flow
• Ensures RTL models perform the same functions as the corresponding transistor circuits implemented on silicon (GXL configuration)
• Exhaustively verifies multi-million–gate ASICs and FPGAs several times faster than traditional gate-level simulation
• Extends equivalence checking capability to complex datapaths and closes the RTL-to-layout verification gap (XL configuration)

Target Markets

• Broadcast
• Automotive
• High Performance Computing
• Consumer
• Aerospace & Defense
• Industrial Scientific Medical
• Industrial Scientific Medical
• Wired Communications
• Wireless Communications